The term 'beat frequency' is a misnomer. It really should be termed the 'fundamental frequency', which in this case is the output frequency. If you divider is in 'divide by 2 mode', then the fundamental frequency is half the input frequency. If it is divider by 3 model, it is one third the input frequency.

-Ken

The fact that you are changing the divide ratio on the fly is an important fact. You'd get a usable answer more quickly and cause less frustration if you state the important facts up front. Another important fact is how the ratio is changing. Without knowing these things it is impossible to answer your question except in very non-specific ways, and so most people will not bother to respond because they know they will have to go through a long process of grilling you for the important facts, which you are not volunteering.

Here is what you do. Determine the period of your circuit. Take the reciprocal. Put that number into the Beat Frequency field. If your circuit is not periodic, you cannot use RF simulation. In this case, you will have to explain what it is you are trying to accomplish. And if you do, please think about your question carefully and make sure you have given enough information so it can be answered as is.
-Ken

Ken,
The divider is a standard dual modulus prescaler (dmp) based divider. The dmp is a synchronous counter. The dmp for an input control signal (MC) high  divides by 3 and when the signal is low divides by 2.
The output clock from dmp clocks two decrementing counters- call them P and S counters. When the S counter reaches zero it lowers the MC signal and dmp switches to divide by 2. When the P counter reaches zero it resets the S and P counters and the counters are reloaded. Resetting S raises MC signal.

What it means is that for S value dmp is dividing by 3 (N+1)  and for  P-S by 2 (N).
This gives the full counter a divide ratio of (N+1)*S + N (P-S) = NP+S.
Why I did not mention this whole theory earlier was because I assumed that it was known (guess I was wrong).

Now the fact is that dmp though clocked by an external clock,  has a divide output that shifts from divide by 3 for S periods to divide by 2 for P-S periods. It is because of this reason that I am unsure about the beat frequency.


Thanks,
Bupesh

Ken Kundert wrote on Mar 19^th, 2010, 5:16pm:
panditabupesh does not mean Fractional-N synthesizer.

He means conventional Integer-N frequency divider using dual modulus prescaler(1/M and 1/(M+1)) and pulse swallowing counter(A).
http://en.wikipedia.org/wiki/Dual-modulus_prescaler

panditabupesh wrote on Mar 18^th, 2010, 8:23pm:
panditabupesh wrote on Mar 19^th, 2010, 5:11am:
panditabupesh wrote on Mar 19^th, 2010, 2:01pm:

panditabupesh, what EDA vendor's simulator do you mean as "PSS" ?
There are many simulators which have analysis called as PSS.
Always describe vendor's name which you use as tool or simulator.

Don't use a term of "beat", if you mean PSS of Cadence Spectre.

See "spectre -h pss", if you mean PSS of Cadence Spectre.
There is no "beat" in analysis statement for PSS of Cadence Spectre.
"beat frequency" of PSS setting UI is not beat frequency. It is a "fundamental frequency" not beat frequency.

I can't understand why Cadence has kept to use this expression of "beat" in PSS's setting UI.
http://www.designers-guide.org/Forum/YaBB.pl?num=1232036048/4#4

I think fundamental period is (M*N+A)*T_in since all signals behave periodically with this period time.
So fundamental frequency is f_in/(M*N+A).

panditabupesh wrote on Mar 20^th, 2010, 4:35pm:
Observe time domain waveforms considerably.
They behave periodically with time period of 7*Tclk, even if the frequency of prescaler output is changing between fclk/2 and fclk/3.

panditabupesh wrote on Mar 20^th, 2010, 4:35pm:
"at any time"???
It seems you can't understand very basic theory of modulation and working mechanism of this prescaler at all.

Even simple 2-FSK signal modulated by periodic signal synchronous to carrier is also periodic.

All signals including the output of prescaler behave periodically with time period of 7*Tclk.

panditabupesh wrote on Mar 20^th, 2010, 4:35pm:
Again, don't use a term of "beat".
You can get convergencve with fundamental frequency=fclk/(NP+S). So fundamental period is surely (NP+S)*Tclk.

panditabupesh wrote on Mar 18^th, 2010, 8:23pm:
In your first post, you said you can't get convergence in PSS.
What value did you set as fundamental frequency of PSS ?

panditabupesh wrote on Mar 20^th, 2010, 4:35pm:
Show me netlists regarding signal sources, analysis statements and options statements.
Show me logfile of simulation.

Ken Kundert wrote on Mar 21^st, 2010, 12:06am:
I don't think so.
I have to confirm "maxstep" or "maxacfreq" in PSS setting and "maxsideband" in Pnoise setting.

panditabupesh wrote on Mar 22^nd, 2010, 7:34am:
If you confirm periodicity, fourier series expansion is not proper.

Evaluate auto-correlation function.
http://www.designers-guide.org/Forum/YaBB.pl?num=1239938942/2#2