The following people have reached the grade of Fellow on The Designer's Guide Community Forum. As such, they answer most of the questions that are asked (a Community Fellow must have at least 317 posts, a Senior Fellow must have 1000 posts). This page both honors these individuals for their important contributions to the community, and allows you to get to know the people that have been so helpful.

Founder and Host of The Designer's Guide Community

As one half of Designer's Guide Consulting, Ken helps design companies move to more effective design and simulation practices and helps CAD companies produce better products.

From 1989 to 2005, Ken worked at Cadence Design Systems as a Fellow. During this time Ken Kundert created Spectre and was the principal architect of the Spectre circuit simulation family. As such, he has led the development of Spectre, SpectreHDL, and SpectreRF. He also played a key role in the development of Cadence's AMS Designer and Agilent's harmonic balance simulator; and made substantial contributions to both the Verilog-AMS and VHDL-AMS languages. He has authored Sparse, an industry standard sparse linear equation solver, and has written three books on circuit simulation: The Designer's Guide to Verilog-AMS in 2004, The Designer's Guide to SPICE and Spectre in 1995, and Steady-State Methods for Simulating Analog and Microwave Circuits in 1990. He has also authored eleven patents and over two-dozen papers published in refereed conferences and journals.

In an earlier life, Ken was a circuit designer at Tektronix and Hewlett-Packard, and contributed to the design of the HP 8510 microwave network analyzer.

Ken received his Ph.D. in Electrical Engineering from the University of California at Berkeley in 1989, his M. Eng. degree in 1983 and his B.S. in 1979.

Ken was elevated to the status of IEEE Fellow in November of 2006 for contributions to simulation and modeling of analog, RF, and mixed-signal circuits.

He became a Community Fellow of our forum in 2004 and a Senior Fellow in 2007.

Andrew is a Senior Technical Leader at Cadence Design Systems, based in Bracknell (a small town to the west of London) in England.

Andrew joined Cadence in 1995, and is the technical lead for CIC customer support in Europe. His areas of expertise are Analog, Mixed Signal and RF simulation; custom and assisted layout; physical verification; schematic entry; design management; SKILL and the design framework. He'll quite happily dabble in other areas too if needed! During his time with Cadence, he's also worked on numerous design and software services engagements, as well as given lots of training classes and countless customer visits.

Before joining Cadence, Andrew was an analog and mixed signal designer for Fujitsu Microelectronics in Uxbridge and Maidenhead, mainly focussing on advanced data converters, switch capacitor circuits, and circuits for low power communication systems (such as GSM). He was awarded a patent for a novel ADC architecture whilst at Fujitsu.

Prior to Fujitsu, Andrew worked for LSI Logic in Footscray, Kent, as an analog designer, and before that for AMSYS at GEC Hirst Research Centre in Wembley, London.

During these design roles, Andrew developed a number of EDA tools including a large part of a full custom layout editor, waveform display tools, design environments, custom simulators, and lots of glue to hold everything together.

Andrew gained his BEng(Hons) at the University of Bristol in 1987.

Andrew is also a frequent contributor to the comp.cad.cadence news group. He became a Community Fellow of our forum in 2005.

Jess spent the first 15 years of his professional career at Lockheed in Sunnyvale, CA, modeling, designing, and analyzing space craft power systems and motor drives. He also developed a system for flash testing space station solar arrays. In 1995 Jess joined Cadence Design Systems, where he developed the J/K modeling links between SPW and SpectreRF, the baseband equivalent models in the rfLib library, and the state space averaged PFD model in pllLib library. His K-model and PFD model were patented. In 2000 Jess joined Resonext/RFMD, where he performed RF systems analysis, wrote behavioral models of RF transceivers, developed behavioral synthesizer models, and developed automatic calibration algorithms for direct conversion receivers/transmitters. His DC offset calibration algorithm was patented. Patents on three IQ mismatch calibration algorithms are pending. In 2005 Jess joined Berkana Wireless. At Berkana, Jess performed RF systems analyses and wrote VerilogA models for top level functional and performance verification of cell phone transceivers. Jess is currently a senior staff engineer at Qualcomm in Campbell, CA.

Jess earned a BA in physics and applied math from UC Berkeley in 1977, an MSEE from San Jose State University in 1982, the degree of engineer in EE (control theory) from Stanford in 1985, and an MSME from Santa Clara University in 1991.

He became a Community Fellow of our forum in 2006.

Yawei Guo is with Shanghai MicroScience Integrated Circuits Co., Ltd., based in Shanghai, P. R. China.

Yawei joined MicroScience in August 2003. He has been leading a group and developing analog and mixed signal circuits for video application and information security. His main interests include data communication, data converters, and phase locked loops.

From 2002 to August 2003, Yawei was with Philips Semiconductors in Shanghai.

Yawei designed SERDES and clock generation circuit when he was a graduate student in Fudan University from 1999 to 2002.

Yawei has authored and coauthored several papers in conferences and one patent.

Yawei Guo received his B.S. and M.S. degree from Fudan University in 1999 and 2002 respectively.

He became a Community Fellow of our forum in 2007.

Alan is currently designing SoCs for ultra-low-power wireless bio-telemetry systems at Toumaz Technology Ltd, based in Oxfordshire, UK.

Before joining Toumaz, he was with Sony Semiconductor, designing RFICs, including wireless transceivers for GSM, GPRS and EDGE mobile handset markets and Bluetooth transceivers.

Prior to Sony he was with Tokyo Electron Ltd, supporting CMOS thermal processing (CVD, Diffusion) throughout various foundries in Europe.

Alan graduated with an MEng(Hons) in Engineering Science from Christ Church, University of Oxford, UK in 1997. He also spent time as a research assistant with Oxford University's Robotics Research Group, working on transputer based real-time mobile robot control systems.

He became a Community Fellow of our forum in 2007.

Paul is a mixed-signal IC design engineer at Marvell Semiconductor, based in Etoy, Switzerland.

He received his M.Sc. and Dr.Sc. degrees in electrical engineering from the Ecole Polytechnique Fédérale de Lausanne (EPFL) in Lausanne, Switzerland. In between, he worked for several years as a mixed-signal design engineer on switched-capacitor circuits for data acquisition systems in a swiss fabless semiconductor company called XEMICS (now part of Semtech Corp.).

His doctoral dissertation is on the analysis, modeling and design of multi-channel gigabit optical receivers in CMOS for short-distance communication interfaces. Paul's research interests are in the area of CMOS circuits for data conversion and communication systems, as well as mixed-signal and system-level modeling.

He became a Community Fellow of our forum in 2006.