The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Apr 28th, 2024, 3:39pm
Pages: 1 2 
Send Topic Print
bdasim vs spectre (Read 24381 times)
Mayank
Community Fellow
*****
Offline



Posts: 334

bdasim vs spectre
Jan 29th, 2010, 3:33am
 
Hi,
     I am simulating a PLL for transient noise -- with verilogA model of white noise source & supply inductances.
     To my surprise, For the SAME NETLIST, Spectre is running much faster than BDA AFS.
My Observations --
1.  Spectre is taking time-steps in a few hundreds of femto-seconds, while BDA in a few tens of femto-seconds....[ makes spectre around 10x faster --- yeah, i checked all settings are same -- SAME NETLIST ]
2.  Transient results are matching from both spectre and bda, but bda is lagging behind.

Wasn't BDA AFS supposed to be much faster than Spectre ??
Any Ideas as to why is this happening ?

--
Mayank..
Back to top
 
 
View Profile   IP Logged
pancho_hideboo
Senior Fellow
******
Offline



Posts: 1424
Real Homeless
Re: bdasim vs spectre
Reply #1 - Jan 29th, 2010, 3:47am
 
Show me your verilogA model of white noise source.

Generate white noise by combination of "analogLib/res" and "analogLib/vcvs" instead of your custom verilog-A module.
Back to top
 
 
View Profile WWW Top+Secret Top+Secret   IP Logged
Mayank
Community Fellow
*****
Offline



Posts: 334

Re: bdasim vs spectre
Reply #2 - Jan 29th, 2010, 4:22am
 
Here, the verilogA model goes like this :----

Code:
// VerilogA for PLLCells, white_noise_source, veriloga

`include "constants.vams"
`include "disciplines.vams"

module white_noise_source(p, n);
inout p;
inout n;
electrical p;
electrical n;

parameter real mean = 0;
parameter real std_dev = 1;
parameter real update_freq = 50e9;
integer seed;
integer state;
real update_per,x;
parameter real scale = 10e-3;
  analog begin
	  @(initial_step) begin
		    seed = 1;
		    state = 0;
		    update_per = 1/update_freq;
	  end

	  @(timer(0,update_per)) begin
		    x = scale * $rdist_normal(seed,mean,std_dev);
	  end
		    V(p,n) <+ x;
  end

endmodule
 



Will this cause it to become slow ??

--
Mayank.
Back to top
 
 
View Profile   IP Logged
pancho_hideboo
Senior Fellow
******
Offline



Posts: 1424
Real Homeless
Re: bdasim vs spectre
Reply #3 - Feb 1st, 2010, 2:57am
 
Mayank wrote on Jan 29th, 2010, 4:22am:
Code:
@(timer(0, update_per)) begin
   x = scale * $rdist_normal(seed, mean, std_dev);
end
V(p, n) <+ x; 

Will this cause it to become slow ??
I think your implementation could be problematic.

Anyway generate white noise by combination of "analogLib/res" and "analogLib/vcvs" instead of your custom verilog-A module.
Back to top
 
 
View Profile WWW Top+Secret Top+Secret   IP Logged
rf-design
Senior Member
****
Offline

Reiner Franke

Posts: 165
Germany
Re: bdasim vs spectre
Reply #4 - Feb 1st, 2010, 6:27pm
 
A quick guess:

Could be the accuracy setting being different interpreted in both simulators. Spectre have a general accuracy modifier with settings

[conservative,moderate,liberal]

which overwrite analog simulator settings.
Back to top
 
 
View Profile   IP Logged
Mayank
Community Fellow
*****
Offline



Posts: 334

Re: bdasim vs spectre
Reply #5 - Feb 1st, 2010, 9:18pm
 
Thanx rf-design,
                        Quote:
Spectre have a general accuracy modifier with settings

[conservative,moderate,liberal]

which overwrite analog simulator settings.
I didnt knew this....i am using conservative in spectre and accuracy settings as default -- reltol---1e-3, vabstol--1e-6, iabstol---1e-12......Would this explain such a behaviour ?

--
mayank.
Back to top
 
 
View Profile   IP Logged
Andrew Beckett
Senior Fellow
******
Offline

Life, don't talk to
me about Life...

Posts: 1742
Bracknell, UK
Re: bdasim vs spectre
Reply #6 - Feb 2nd, 2010, 11:16am
 
With the accuracy settings at default, and just overriding the errpreset to conservative, you are tightening reltol by a factor of 10 (see "spectre -h tran").

It's not guaranteed that AFS will be faster than spectre! It may be that spectre's VerilogA implementation is more robust (it will certainly be more mature) or maybe just more forgiving.

To be fair though, your model is causing the simulator(s) to have to try to place a timestep precisely every 1/update_freq.  You may be better off using bound_step instead as this gives the simulator more freedom - I assume you don't particularly need the updates to be precisely regular?

Regards,

Andrew.
Back to top
 
 
View Profile WWW   IP Logged
Mayank
Community Fellow
*****
Offline



Posts: 334

Re: bdasim vs spectre
Reply #7 - Feb 3rd, 2010, 5:55am
 
Hi,
  @ Andrew : Quote:
I assume you don't particularly need the updates to be precisely regular?
No, I do not.  I had a feeling that since i kept noise fmax factor in tran setup upto 50G, i should update this white noise source also at 50G.
Quote:
It may be that spectre's VerilogA implementation is more robust (it will certainly be more mature) or maybe just more forgiving.
Fair enough point.  :)
i will try with bound_step, will have to read more of verilogA though.

  @ Pancho : Quote:
Generate white noise by combination of "analogLib/res" and "analogLib/vcvs" instead of your custom verilog-A module.
Would try this.

--
thanx,
Mayank.
Back to top
 
 
View Profile   IP Logged
pancho_hideboo
Senior Fellow
******
Offline



Posts: 1424
Real Homeless
Re: bdasim vs spectre
Reply #8 - Feb 3rd, 2010, 6:06am
 
Mayank wrote on Feb 3rd, 2010, 5:55am:
@ Andrew : Quote:
I assume you don't particularly need the updates to be precisely regular?
No, I do not.  
I had a feeling that since i kept noise fmax factor in tran setup upto 50G,
i should update this white noise source also at 50G.
fmax can't be 50GHz by your Verilog-A Module.

With your implementation of noise by Verilog-A, behavior between "update_per" could be different between simulators you use.
Confirm PSD of your Verilog-A Module alone.

Anyway generate white noise by combination of "analogLib/res" and "analogLib/vcvs" instead of your custom verilog-A module.
If you use white noise by combination of "analogLib/res" and "analogLib/vcvs", you can control fmax for noise correctly by transient noise analysis parameter.

Compare time domain waveform and PSD with your Verilog-A Module in normal transient analysis.
Back to top
 
« Last Edit: Feb 3rd, 2010, 9:59am by pancho_hideboo »  
View Profile WWW Top+Secret Top+Secret   IP Logged
michael chapman
New Member
*
Offline



Posts: 3

Re: bdasim vs spectre
Reply #9 - Feb 4th, 2010, 7:04am
 
Hello Mayank

I am the applications engineering manager for BDA in Europe. Please feel free to contact BDA for support in cases like this. You will find the support numbers for your region on the BDA website under "contact us" at www.berkeley-da.com. If you are based in India, please contact the UK office.

You should consistantly get 5X to 10X faster runtimes with AFS compared to Spectre for circuits > 1000 elements and with a reasonably long runtime. If you are not achieving this, I would be pleased to help out. I suspect, as others have pointed out, that the problem is the  VerilogA code. I suggest using a resistor to generate the white noise instead of the VerilogA module. You will need to turn on transient noise analysis using noisefmax=50G option on the tran analysis line. Failing this, please do as Andrew suggests and use $bound_step to give the time-stepper algorithm more freedom.

in response to user "rf-design"'s comment, setting errpreset=conservative in AFS has essentially the same effect in AFS as it does in Spectre.

Regards

Michael Chapman
Back to top
 
 
View Profile   IP Logged
pancho_hideboo
Senior Fellow
******
Offline



Posts: 1424
Real Homeless
Re: bdasim vs spectre
Reply #10 - Feb 4th, 2010, 7:19am
 
michael chapman wrote on Feb 4th, 2010, 7:04am:
Failing this, please do as Andrew suggests and use $bound_step to give the time-stepper algorithm more freedom.
It is wrong.

If we use $bound_step in addition to "@(timer(0, update_per)) begin ~ end",
$bound_step rather limits freedom of simulator regarding the time-stepper algorithm.

http://www.designers-guide.org/Forum/YaBB.pl?num=1260585749
Back to top
 
« Last Edit: Feb 5th, 2010, 3:00am by pancho_hideboo »  
View Profile WWW Top+Secret Top+Secret   IP Logged
michael chapman
New Member
*
Offline



Posts: 3

Re: bdasim vs spectre
Reply #11 - Feb 4th, 2010, 7:55am
 
Pancho,
Thank you for the correction.

Michael
Back to top
 
 
View Profile   IP Logged
Mayank
Community Fellow
*****
Offline



Posts: 334

Re: bdasim vs spectre
Reply #12 - Feb 4th, 2010, 9:53pm
 
Hi all,
         @ Michael : Quote:
You should consistantly get 5X to 10X faster runtimes with AFS compared to Spectre for circuits > 1000 elements and with a reasonably long runtime.
Without the VerilogA module, AFS indeed runs 10X faster than Spectre(as expected). Btw, i love the way bda converges pss (try converging simultaneously wheile it's running tstab).

2 doubts :---   1> When BDA generates the psf, it generates period jitter, period jitter_flicker, and period jitter_white under the pnoise-SummaryStatistics.Pnoise section.  May i know what formula does bdasim use to compute these values ???
                        2> Do the PPV values under the section pnoise-NoiseSourceIntensityNoiseSensitivityandProduct.pnoise indicate ISFs [ impulse sensitivity functions ] at these nodes ??

regards,
Mayank.
Back to top
 
 
View Profile   IP Logged
Andrew Beckett
Senior Fellow
******
Offline

Life, don't talk to
me about Life...

Posts: 1742
Bracknell, UK
Re: bdasim vs spectre
Reply #13 - Feb 5th, 2010, 2:15am
 
My point about using $bound_step rather than @timer was that bound_step allows the simulator to place a timestep where it wants, provided that it is no further away than a certain amount of time - it limits the maxstep (dynamically) - at least that's what it does in spectre - Pancho Hideboo's reference was to another post which was discussing the behaviour in hspice.

With @timer, the simulator has to solve precisely at the time specified - that can sometimes be more work for the simulator, and can result in more timesteps. (imagine that the simulator needed to take a timestep between two @timer events, for various reasons,  then limiting the bound step would take fewer timesteps than having also to have an event at a regular timestep). Still, this is unlikely to make a massive difference with spectre, but maybe other simulators are more sensitive.

You may also want to try APS. From MMSIM72, you can just use "spectre -aps" to run in APS mode - see http://www.cadence.com/products/cic/accelerated_parallel/pages/default.aspx. MMSIM72 has further performance improvements in APS, so if you're going to take a look, I'd advise using MMSIM72. Also, talk to local support (Cadence has customer support in India, of course).

Regards,

Andrew.
Back to top
 
 
View Profile WWW   IP Logged
pancho_hideboo
Senior Fellow
******
Offline



Posts: 1424
Real Homeless
Re: bdasim vs spectre
Reply #14 - Feb 5th, 2010, 7:17am
 
Mayank wrote on Feb 4th, 2010, 9:53pm:
Btw, i love the way bda converges pss (try converging simultaneously wheile it's running tstab).
I can't understand meaning of your sentence.

What feature do you love in BDA's AFS ?

Mayank wrote on Feb 4th, 2010, 9:53pm:
@ Michael : Quote:
You should consistantly get 5X to 10X faster runtimes with AFS compared to Spectre for circuits > 1000 elements and with a reasonably long runtime.
Without the VerilogA module, AFS indeed runs 10X faster than Spectre(as expected).
Did you use "AFS Multi-Core Capability" ?
http://www.berkeley-da.com/prod/prod01_analog_fs_a.htm

If not so, try to use it. You will get more speed up, although I feel BDA's AFS is very far faster than Cadence Spectre even in single threaded operation.

Currently almost all vendor's simulators which are high price have multi-threaded capability.
Even Agilent ADSsim have Multi-Threaded Harmonic Balance.
http://www.designers-guide.org/Forum/YaBB.pl?num=1184691133

Also see the threads after the following.
http://www.designers-guide.org/Forum/YaBB.pl?num=1183646486/5#5
Back to top
 
« Last Edit: Feb 6th, 2010, 4:11am by pancho_hideboo »  
View Profile WWW Top+Secret Top+Secret   IP Logged
Pages: 1 2 
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.