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Theoretical transconductance VS Cadence Spectre simulator transconductance (Read 2649 times)

niloun

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Theoretical transconductance VS Cadence Spectre simulator transconductance
Jul 23^rd, 2017, 6:12am

I have calculated �transconductance of a NMOS transistor with formula (2*Id/(Vgs-Vth)) and simulated the same circuit in Cadence Spectre with same parameters via two methods, including: 1) DC Analysis>Analog environment>Results>Print>DC operating points
2) plotting derivative of current in respect to Vgs, but Simulation results are different from theory (approximately two times) � Shocked

Would you please explain why does this happen?

« Last Edit: Jul 23^rd, 2017, 1:18pm by niloun »

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Geoffrey_Coram Senior Fellow Offline Posts: 1998 Massachusetts, USA	Re: Theoretical transconductance VS Cadence Spectre simulator transconductance Reply #1 - Jul 24^th, 2017, 8:20am You might try larger devices - sometimes the analytic expressions are affected by short-channel or narrow-width effects.
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DanielLam Community Member Offline Posts: 76	Re: Theoretical transconductance VS Cadence Spectre simulator transconductance Reply #2 - Jul 24^th, 2017, 9:35am I agree with Geoffrey. Try longer device lengths (and widths too while you're at it). At least 2-5um length should be good. Otherwise, if you want the equations to really match up well, you might try going to MOS lvl 3 models (have to make these yourself).
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niloun Community Member Offline Posts: 53	Re: Theoretical transconductance VS Cadence Spectre simulator transconductance Reply #3 - Jul 25^th, 2017, 1:42am Geoffrey_Coram wrote on Jul 24^th, 2017, 8:20am: You might try larger devices - sometimes the analytic expressions are affected by short-channel or narrow-width effects. Thanks so much for the answer.
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niloun

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Re: Theoretical transconductance VS Cadence Spectre simulator transconductance
Reply #4 - Jul 25^th, 2017, 1:46am

DanielLam wrote on Jul 24^th, 2017, 9:35am:

I agree with Geoffrey. Try longer device lengths (and widths too while you're at it). At least 2-5um length should be good.

Otherwise, if you want the equations to really match up well, you might try going to MOS lvl 3 models (have to make these yourself).

Yes, Geoffrey is right , Longer device lengths solely solves the problem, The problem was short channel effect.

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