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PAC of a VCO and a few other questions (Read 4759 times)
trond
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PAC of a VCO and a few other questions
Aug 25th, 2005, 3:15am
 
1)
The PAC output of a VCO should look like the one of an integrator. When using the code given below, the magnitude of the response is only a few mV. It should have a very high gain at dc, should it not? I am confused.
.....
analog begin
freq=f0+Kvco*V(in);
$bound_step(0.01/freq);
phase=2*PI*idtmod(freq, 0, 1, -0.5);
V(out) <+ sin (phase)
end
.....
f0=1e6, Kvco=0.5e6
clkalone pss fund=1e6 errpreset=conservative
freqresp pac start=0.1 stop=1e6/4 log=500

2)
When using phase=2*PI*idtmod(freq, 0, 1); instead of
phase=2*PI*idtmod(freq, 0, 1, -0.5); the PSS will just sit there and do nothing. Why is that? Do I need an offset?

3)
I found that there is a difference between
@(cross( x - 0.5 ,1))
and
@(cross( x - 1/2 ,1))
When using 1/2 it will not trigger.

BTW, I am currently using version 5.10.41.052404

Thanks,
Any feedback is appreciated.
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Eugene
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Re: PAC of a VCO and a few other questions
Reply #1 - Aug 25th, 2005, 8:32am
 
Regarding item #3, assuming the 1/2 and 0.5 are the only differences in your file, try replacing 2 with 2.0. On some rare occasions I've seen the ".0" make a difference.
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Eugene
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Re: PAC of a VCO and a few other questions
Reply #2 - Aug 25th, 2005, 8:37am
 
Regarding item #1, the integration is associated with phase. Is your PAC analysis looking at VCO phase or VCO voltage?
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Eugene
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Re: PAC of a VCO and a few other questions
Reply #3 - Aug 25th, 2005, 8:44am
 
Regarding item #2, I think we need more information. Is x from #3 somehow related to the idtmod of #2? It sounds like the lack of an offset shifts the idtmod output such that it never crosses some sort of key threshold.
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Re: PAC of a VCO and a few other questions
Reply #4 - Aug 25th, 2005, 9:02am
 
Thanks Eugene for taking the time to answer my questions.
[quote author=Eugene  link=1124964940/0#2 date=1124984270]  Regarding item #1, the integration is associated with phase. Is your PAC analysis looking at VCO phase or VCO voltage? [/quote]
I have the output defined as voltages. How would that make  difference? Please explain your thoughts.

[quote author=Eugene  link=1124964940/0#2 date=1124984270] Regarding item #3, assuming the 1/2 and 0.5 are the only differences in your file, try replacing 2 with 2.0. On some rare occasions I've seen the ".0" make a difference. [/quote]
That solved the problem. That is funny. Why would there be a difference between 1/2.0 and 1/2?

[quote author=Eugene  link=1124964940/0#2 date=1124984270]   Regarding item #2, I think we need more information. Is x from #3 somehow related to the idtmod of #2? It sounds like the lack of an offset shifts the idtmod output such that it never crosses some sort of key threshold. [/quote]
When I take the code from #1 and do a PSS as shown it works fine. When I do the same thing again, but this time remove the offset or have 0 offset, the PSS will run once, and sit at the beginning of the second try forever.
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Geoffrey_Coram
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Re: PAC of a VCO and a few other questions
Reply #5 - Aug 25th, 2005, 10:13am
 
> Why would there be a difference between 1/2.0 and 1/2?

1/2 is an integer divide, according to the rules of Verilog. Sad
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Eugene
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Re: PAC of a VCO and a few other questions
Reply #6 - Aug 25th, 2005, 10:58am
 
Item #1:
You are of course right about integrals producing infinite AC response at DC but the VCO voltage is a sinusoidal function of phase and a sinusoid  is bounded.  In fact, regardless of the phase, the amplitude of the sinusoid is constant. So if your PAC analysis looks only at voltage amplitude, you will see little or no dependence on the integral of frequency. You must detect phase to see the effects of the integral in a PAC analysis and that is not trivial.

Note that the "phase" button on the pac output form is for the phase of the transfer function, not the phase of the VCO output. You can have a transfer function from frequency input to amplitude output and from frequency input to phase output. Both transfer functions have phase and those phases are not the same as the phase of the VCO output. For the output of interest, you can only select peak or rms units, which both relate to the amplitude of the sinusoidal VCO output, not its phase. You will need a phase detector to get the transfer function from frequency input to VCO phase.

Item #2:
Thanks for the information Geoffrey. My knowledge of the integer divide was strictly empirical. I did not know it was related to the standard. Personally, I would like to see this problem classified as a bug.

Item #3:
I suspect the idtmod drives something; some other signal probably depends on the idtmod output, probably by way of a threshold. If you remove the offset, you shift the idtmod output, perhaps such that the idtmod output can no longer trip the threshold. That's just my guess. As I hinted, it's hard to diagnose the problem without more of the code.
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« Last Edit: Aug 25th, 2005, 2:14pm by Eugene »  
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Eugene
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Re: PAC of a VCO and a few other questions
Reply #7 - Aug 25th, 2005, 11:33am
 
Regarding item #2, I believe I've duplicated the problem. I think it's a bug. I'll add more later. I have to run.
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Re: PAC of a VCO and a few other questions
Reply #8 - Aug 25th, 2005, 12:27pm
 
[quote author=Eugene  link=1124964940/0#6 date=1124992717]
Item #2:
Thanks for the information Geoffrey. My knowledge of the integer divide was strictly empirical. I did not know it was related to the standard. Personally, I would like to see this problem classified as a bug.
[/quote]

Try it in C:
 double foo;
 foo = 1/2;
 printf("foo = %f \n", foo);

I get 0.000000.
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Re: PAC of a VCO and a few other questions
Reply #9 - Aug 25th, 2005, 1:57pm
 
The code below duplicates problem #3. Without the offset, PSS makes the first pass and then hangs. In my opinion, regardless of the error, the simulator should never just hang. I should have gotten a warning or error message, even a cryptic one. But to just hang is very strange. I would strip the circuit down to its most simple form and submit it to Cadence.

In the circuit below, I drove vin with a one volt DC source. I included an external 1Hz source to make sure the time steps were correct and to have a named frequency.  Commenting out the idtmod with the offset and uncommenting the other reproduces the problem I think you encountered. One source runs phase from 0 to 2pi while the one that works runs the phase from -pi to +pi. I have no idea why one works and the other causes PSS to hang but as I said, I think it's a bug.

module vco(vout, vin);
output vout;
electrical vout;
input vin;
electrical vin;
real phase;

analog begin
  //phase = idtmod(V(vin),0,1,-0.5);//Works.
  phase = idtmod(V(vin),0,1);//Hangs PSS.
  V(vout) <+ sin(`M_TWO_PI*phase);
end
endmodule
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« Last Edit: Aug 25th, 2005, 10:11pm by Eugene »  
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Re: PAC of a VCO and a few other questions
Reply #10 - Aug 25th, 2005, 10:39pm
 
Thanks for the feedback and recognizing (duplicating) the issues I raised.

For the problem with the PSS that hangs at the second trial, I would not really know how to strip the circuit down even simpler as it is already consists of only two lines of code.
BTW, Spectre version 5.033 produces the same errors. I had only tested the code with 5.141.

Eugene, thanks for explaining more on phase and voltages. But one more question, when I have the vco offset frequency f0=0 and leave Kvco at Kvco=1e6 and do a PSS and PAC with fund=1e6 then, it will give me a very large gain at dc. So, with f0=1e6 almost no gain at dc, with f0=0 almost infinity.

I do agree that 2 is an integer, but that should no make 1/2 an integer too, especially when ones assigns  1/2 to a variable of type other than integer as Geoffrey_Coram did with the C program.
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Re: PAC of a VCO and a few other questions
Reply #11 - Aug 26th, 2005, 1:04am
 
[quote author=svensl  link=1124964940/0#10 date=1125034784]I do agree that 2 is an integer, but that should no make 1/2 an integer too, especially when ones assigns  1/2 to a variable of type other than integer as Geoffrey_Coram did with the C program. [/quote]
The result of 1/2 is first calculated as an integer (giving 0), then this result is assigned to the variable (this action of course does not change the value of the result). Although it may be non-intuitive, this is the standard behavior of programming languages like C and Fortran, see e.g. http://computer.howstuffworks.com/c11.htm and http://www.liv.ac.uk/HPC/HTMLF90Course/HTMLF90CourseNotesnode112.html.
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Re: PAC of a VCO and a few other questions
Reply #12 - Aug 26th, 2005, 1:21am
 
[quote author=Frank Wiedmann  link=1124964940/0#11 date=1125043463]
The result of 1/2 is first calculated as an integer (giving 0), then this result is assigned to the variable (this action of course does not change the value of the result). Although it may be non-intuitive, this is the standard behavior of programming languages like C and Fortran, see e.g. http://computer.howstuffworks.com/c11.htm and http://www.liv.ac.uk/HPC/HTMLF90Course/HTMLF90CourseNotesnode112.html. [/quote]
Thanks for pointing that out to me Frank. I will keep it in mind in the future.
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Frank Wiedmann
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Re: PAC of a VCO and a few other questions
Reply #13 - Aug 26th, 2005, 4:20am
 
[quote author=Eugene  link=1124964940/0#9 date=1125003473]The code below duplicates problem #3. Without the offset, PSS makes the first pass and then hangs. In my opinion, regardless of the error, the simulator should never just hang. I should have gotten a warning or error message, even a cryptic one. But to just hang is very strange. I would strip the circuit down to its most simple form and submit it to Cadence. [/quote]
I can also confirm this problem (with Spectre version 5.10.41_USR2.052705). Interestingly, it does not occur when I activate the pss oscillator analysis. It also only seems to occur when I perform the same simulation a second time.

I have reported this to Cadence. The application engineer at Cadence has been able to reproduce the problem and it is now being handled as PCR 835250.
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« Last Edit: Aug 29th, 2005, 1:08am by Frank Wiedmann »  
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Re: PAC of a VCO and a few other questions
Reply #14 - Aug 26th, 2005, 4:32am
 
[quote author=svensl  link=1124964940/0#10 date=1125034784]Eugene, thanks for explaining more on phase and voltages. But one more question, when I have the vco offset frequency f0=0 and leave Kvco at Kvco=1e6 and do a PSS and PAC with fund=1e6 then, it will give me a very large gain at dc. So, with f0=1e6 almost no gain at dc, with f0=0 almost infinity. [/quote]

I have tested your circuit and there is a large gain at dc. Did you look at the correct sidebands? Here are the relevant parts of my netlist:

Code:
Ivco (in out) vco f0=1e6 Kvco=1e6
Vin (in 0) vsource dc=0 pacmag=1 pacphase=0 type=dc
pss  pss  fund=1e6  harms=5  errpreset=conservative  annotate=status
pac  pac  sweeptype=absolute  start=1  stop=1e5  maxsideband=5  annotate=status 


Plot dB20(v("/out" ?result "pac-pac")) and look at the harmonics 1 and -1. I get 114 dB at 1 Hz and the expected slope of 20 dB per decade.
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