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flicker noise (Read 6965 times)
ywguo
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flicker noise
Jan 10th, 2005, 6:50pm
 
Hi,

I am transfering a two-stage CMOS opamp from 0.35um process of Foundry A to 0.25um process of Foundry B. It is unfortunately that the flicker noise increases about 100 times.

I check the operation point, gain of each stage. The transistors are all biased in saturation region.

Does the flicker noise of MOS transistor vary so much (about 2 order of magnitude) from one generation to next generation?

Another question.

Somebody said that PMOS has smaller flicker noise because it has buried channel (the channel not at the surface). But deep sub-micron technology don't have buried channel. So I found the PMOS has larger fliker noise in the 0.25um process of Foundry B. Is that right?

Thanks very much

Yawei
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Paul
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Re: flicker noise
Reply #1 - Jan 10th, 2005, 11:47pm
 
HelloYawei,

flicker noise is directly related to the quality of the oxyde-channel interface. In more modern technologies, this interface is usually of better quality, so that, for equal device size (i.e. not scaled), the flicker noise in the modern technology should drop, not increase. But I guess you scaled down your devices, so that flicker noise should remain approx constant (for a constant scaling factor).

Not, the problematic issue with flicker noise is that the quality of the model depends a lot on the efforts made by your foundry to characterize it. You know, the longer the measurement, the more noise you get (as it raises at lower frequencies).

It is not clear in your post whether you are talking about simulation results or measurements. In the first case, I would check the quality of the model (the process documentation should give some characterized values). In the second cas, I would carefully check the scaling rules operated during the design transfer.

Hope this helps

Paul
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ywguo
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Re: flicker noise
Reply #2 - Jan 11th, 2005, 7:38am
 
Paul,

I was talking about simulation results. I had not scale the devices. I had checked the SPICE model before I post the question. But they choose different noise model. One is Berkeley noise model (NOIMOD=1, BSIM 3v3), the other is SPICE noise model (NLEV=3, BSIM 3V3). It is difficult to compare them.

I will check them again and try to figure out the equation of both noise model.

Thanks very much.

Yawei
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Re: flicker noise
Reply #3 - Jan 11th, 2005, 1:54pm
 
Hi, Yawei,
Looks to me that you are using BSIM3 models, as the
noise flags in BSIM4 are TNOIMOD and FNOIMODE.

There are 2 types of mosfet noise models in BSIM3:
1.Hspice mosfet noise model ~ NLEV, AF, KF and GDSNOI
2.Berkeley mosfet noise model ~ NOIMOD, NOIA, NOIB, NOIC, EM, AF, EF, KF and GDSNOI.

For NOIMOD 1, spice2 noise model is used for flicker noise,
which is a function of Ids, Leff and f.  For NLEV3, the
flicker noise is a function of gm, Leff, Weff, and f.  So, even
for the same process from the same fountry, and the same
design, the flicker noise should not be the same.

>Does the flicker noise of MOS transistor vary so much >(about 2 order of magnitude) from one generation to >next generation?
It should not be that different.  Please check the KF value
in your spice models.

>I will check them again and try to figure out the equation >of both noise model.  
You can refer to the following for details:
For  Hspice noise model:
Hspice MOSFET models manual -> Chapter 2 Technical
Summary of MOSFET Models -> Noise models

For Berkely noise mode:
BSIM3V3 Manual -> Chapter 8 Noise Models
The BSIM3V3 manual URL:
http://www-device.eecs.berkeley.edu/~bsim3/arch_ftp.html

Let me know if I can provide you with further info.

Thanks.

--Charlie
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101questions
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Re: flicker noise
Reply #4 - Jan 13th, 2005, 12:07am
 
[quote author=ywguo  link=1105411811/0#0 date=1105411811]Hi,

I am transfering a two-stage CMOS opamp from 0.35um process of Foundry A to 0.25um process of Foundry B. It is unfortunately that the flicker noise increases about 100 times.

[/quote]

Yawei, do you mean 100 times in voltage or squared voltage?
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ywguo
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Re: flicker noise
Reply #5 - Jan 13th, 2005, 10:55pm
 
Hi, crhu,

I have checked SPICE model for 0.25um CMOS process of Foundry B.

For its n-channel transistor, KF=3.454E-24, AF=0.8824.
For its p-channel transistor, KF=1.184E-23, AF=1.2828.

Is that reasonable?

Thanks
Yawei
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ywguo
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Re: flicker noise
Reply #6 - Jan 13th, 2005, 11:11pm
 
Hi, 101questions,

It 100 times in volts/root-square(Hz).


Thanks
Yawei
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101questions
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Re: flicker noise
Reply #7 - Jan 14th, 2005, 6:11am
 
Yawei,

There is no chance the flicker noise jums by a factor of 100!
It only can happen in case of gross misprocessing.

Do you use binned model in old or new process? Do noise paremeters present in all bin sections?
Do old and new schematics differ in gain, dc state or some other significant parameter, other than flicker noise?

As for your second question, in 0.25um process pmos still should have an edge in 1/f noise performance.  How reputable is your foundry B?
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ywguo
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Re: flicker noise
Reply #8 - Jan 23rd, 2005, 5:31pm
 
Hi, 101questions,

I found there an error when plotting noise pdf. It shows V/rt-Hz on the Y-axis. But it is really V^2/Hz when I calculate the noise pdf of the resistors and amplifiers. Smiley So your point is right.
Quote:
There is no chance the flicker noise jumps by a factor of 100!


By the way, my new model is a binned model. It has equal noise parameters for all bin sections.

Thanks very much

Yawei
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Re: flicker noise
Reply #9 - Jan 24th, 2005, 12:55pm
 
Hi Yawei,

In fact 10 times difference in flicker noise is still too large to be explained by process differences. Can it be that your old 0.35um models is problematic and shows too low 1/f noise? Does it correlate with measurements?
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