RFICDUDE
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It is an interesting point.
At low frequency, CMOS devices do have nearly infinite input impedance and very high voltage gain. The noise contribution of the device is generally thought of as an additive noise current, so the higher the voltage gain the lower the input referred noise. This viewpoint seems valid for low/medium frequency ranges and is only limited by the achievable voltage gain versus the noise current.
Unfortunately, really high voltage gain requires active loads which have much worse noise performance than a passive resistor load, so there is a trade off between achievable gain and additive noise.
At high frequencies, this approach has to be moderated because the input is not high impedance because of the input capacitance. The only logical thing to do is to resonant out the input capacitance, but still the input impedance is not nearly as large as it is at low frequency. Moreover, the real part of the input is very small making it difficult to match to a fixed input impedance (inductive source degeneration is needed).
So, in summary, at low frequencies you cannot achieve very high gain with lower noise passive resistor loads. With active (noisy) loads high gain is achieavable at the expense of excess noise. At high frequencies, really high gain is not practically achievable and the optimal impedance to maximize SNR is far from an open or short.
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The LNA input impedance matching (Read 6427 times)