// D-Flip Flop test circuit for Spectre
//
// Version 1a, 21 March 2007
//
// Ken Kundert
//
// Downloaded from The Designer's Guide Community (www.designers-guide.org)
// Post any questions on www.designers-guide.org/Forum.

simulator lang=spectre
ahdl_include "dff.va"

parameters Vdd=1.0
parameters cycles=101
parameters Fclk=1kHz
parameters Fin=(1+1/cycles)*Fclk

Vclk (clk 0) vsource type=pulse val0=0 val1=Vdd period=1/Fclk delay=1ms
Vin (d 0) vsource type=pulse val0=0 val1=Vdd period=1/Fin
FF1 (clk d q1) dff v0=0 v1=Vdd td=0 tt=0.1/Fin

//Vrst (rst 0) vsource type=pulse val0=0 val1=Vdd period=10.1/Fclk
Vrst (rst 0) vsource type=pwl wave=[0			0	\
				    1.7ms		0	\
				    (1.7ms+10us)	Vdd	\
				    3.5ms		Vdd	\
				    (3.5ms+10us)	0	\
				    6.8ms		0	\
				    (6.8ms+10us)	Vdd	\
				    8.8ms		Vdd	\
				    (8.8ms+10us)	0 ] delay=1ms
FF2 (clk qb2 rst q2 qb2) dff2 v0=0 v1=Vdd td=0 tt=10us init_state=0
FF3 (clk qb3 rst q3 qb3) dff2 v0=0 v1=Vdd td=0 tt=10us init_state=1

setSave options save=allpub

pulseResp tran stop=2*cycles/Fclk skipdc=yes
pulseSSResp pss period=cycles/Fclk skipdc=yes