// Test circuit for logic gates

simulator lang=spectre

ahdl_include "gates.va"

Vi1 (i1 0) vsource type=pulse val1=1 period=1us
Vi2 (i2 0) vsource type=pulse val1=1 period=2us
U1 (nand i1 i2) anand
U2 (nor i1 i2) anor
U3 (and i1 i2) aand
U4 (or i1 i2) aor
U5 (xor i1 i2) axor
U6 (xnor i1 i2) axnor

resp tran stop=4uS