// Test circuit for frequency divider

simulator lang=spectre

ahdl_include "freq-divider.va"

Vclk (in 0) vsource type=pulse period=1us
Div1  (out1  in) divider1 vh=1 vl=0 ratio=4 dir=-1 td=300ns tt=1ns
Div2  (out2  in) divider2 vh=1 vl=0 ratio=4 dir=-1 td=300ns tt=1ns jitter=50ns

resp tran stop=24uS