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Question about gyrator implementation of active inductor (Read 1491 times)
blue111
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Question about gyrator implementation of active inductor
Mar 29th, 2018, 2:28am
 
I am working on a gyrator-based active inductor as described in http://www.seas.ucla.edu/brweb/papers/Conferences/LK_ISSCC15.pdf

I have done a more detailed analytical analysis on Gm2 circuit block as attached with help from others.

For the gyrator-based active inductor, I still have problem obtaining inductor-based behaviour, with unexpected frequency response for a series LC filter.

With S11 measurement result, I am getting NEGATIVE inductance value for https://github.com/promach/frequency_trap/blob/development/test_active_inductor....

Besides, I have also measured transconductance (using AC method, please see https://github.com/promach/frequency_trap/blob/development/Makefile#L19-L23) of both Gm2 circuit block and CMOS_Inverter circuit block.

By using the obtained transconductance measurement results with the equation below to calculate the active inductor value, the calculation result (which is not negative) does not really match what I have for S11 measurement.

Inductance = load_capacitance / [(transconductance of Gm2 circuit block) * (transconductance of CMOS inverter circuit block)]


Could anyone advise ?








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« Last Edit: Mar 30th, 2018, 2:14am by blue111 »  
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danmc
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Re: Question about gyrator implementation of active inductor
Reply #1 - Mar 30th, 2018, 7:09am
 
You should verify that the gm stages are in the correct operating point not only in the real circuit but especially your gm test bench.  The DC gain is high so the output of either gm stage could be railed in the gm sims.

Other things that come to mind are:

- bugs in the post processing (make sure an actual inductor gives the correct result)

- transistor capacitances swamp out the 70 fF load

- 500k degeneration gives very small gm

- double check the dc operating point in the sim of the real ckt.


I'll attach a sketch of what I might do for simulating the gm stages alone.



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pg1.png
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danmc
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Re: Question about gyrator implementation of active inductor
Reply #2 - Mar 30th, 2018, 7:11am
 
and the 2nd picture (why didn't it let me attach both?)
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pg2.png
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blue111
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Re: Question about gyrator implementation of active inductor
Reply #3 - Mar 30th, 2018, 8:48am
 
Quote:
double check the dc operating point in the sim of the real ckt.


The transistors are in saturation mode. Note that X1 is referring to the CMOS inverter.

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danmc
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Re: Question about gyrator implementation of active inductor
Reply #4 - Apr 3rd, 2018, 12:37pm
 
What happens if you replace your two transconductance stages with vccs (i.e. ideal transconductance) with gms that match your simulated gms?  If that gives expected results then capacitances and maybe output resistance on your transistors is the problem.  If the vccs version matches the transistor simulation then the error is in your calculations.  I'd tend to blame capacitances and output resistance of the transistors.
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blue111
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Re: Question about gyrator implementation of active inductor
Reply #5 - Apr 10th, 2018, 8:55am
 
I just found the time to continue with this circuit. Sad

Is the following vccs gyrator circuitry correct ?

Adapted from https://www.edaboard.com/showthread.php?t=369072&page=2&p=1586054&viewfull=1#pos...

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danmc
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Re: Question about gyrator implementation of active inductor
Reply #6 - Apr 10th, 2018, 9:45am
 
Apply a test voltage to IN, call it Vin.  
Vout = -gm1 * Vin * (1/(CL*s)).
The current you get back is
Iin = gm2*Vout = gm2*(-gm1)*Vin/(CL*s)

Now solve for Zin = Vin/Iin = Cl*s / (gm2*(-gm1)) and in your case this becomes
Zin = (0.07pF/(-20mS*-20mS)) * s  = L*s
this gives L = 175 pH.

so is that what you get via simulation?

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blue111
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Re: Question about gyrator implementation of active inductor
Reply #7 - Apr 13th, 2018, 9:06am
 
I have updated the test circuit accordingly.

However, in order to obtain the simulated inductance, Vin/Iin , do I use DC sweep analysis on Vin in this case ? or some other analysis type ?

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danmc
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Re: Question about gyrator implementation of active inductor
Reply #8 - Apr 13th, 2018, 11:37am
 
I wasn't suggesting that you needed to change your circuit.  I was explaining how to analyze it by hand to see what the expected result is so you have something to compare your simulation to.  That is part of the point of going to a very simplified case.  It gets you to a place where you can calculate the result by hand and verify that you're using the tools correctly.  As far as simulating your circuit, an ideal inductor has zero impedance at zero frequency so a DC analysis won't get you much.  A real inductor may have a finite DC resistance, but that still tells you nothing about the inductance.  Clearly it needs to be an AC simulation.    So simulate with driving the ckt with a unit AC voltage and find V/I = 1V/I or drive with a unit current and find V/I = V/1A.  That gives you impedance.  Calculate the imaginary part, divide by 2*pi*frequency and you get inductance.  For such things I find it convenient to put in an explicit inductor driven by its own current source and then use that to get me the 2*pi*frequency term.  L = Lref * imag(V(Ltest)) / imag(V(Lref)).  Sometimes depending on your simulation environment those variables are easier to get at than frequency directly.

Based on all of the questions, I strongly suggest you spend some time with the simulator and some very simple R, L, C circuits and go through the exercise of figuring out how to have the simulator extract parameters of interest.  For example, take a 1 nH inductor.  Set up the simulator to have it actually simulate and report back that it is indeed a 1 nH inductor.  Try again with a series R-L and see if you can figure out how to extract the R and L value from simulation.  Now see if you can extract via simulation the capacitance of a single capacitor.  Do it again for a parallel R-C.  Do this with some really simple things like this so you understand how such parameters are simulated and by using a really simple case where the answer is trivially calculated by hand you will gain confidence in using the simulator.  Then you can think about trying some similar things with active circuits.  See if you can figure out how to simulate the operating point for a simple circuit, either a common source amplifier or an inverter used as an amplifier.  Run a DC sweep and understand how that works.  Run an AC simulation at low frequencies and make sure you understand the results.  For example, is the simulated AC gain consistent with the slope of the output/input curve from the DC sweep?

Until you are comfortable with all of these I think you are going to find things like active inductors, and especially high frequency ones where you are almost surely in a region where transistor capacitances matter, frustrating and impossible to effectively debug.

Good luck.


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blue111
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Re: Question about gyrator implementation of active inductor
Reply #9 - Apr 13th, 2018, 7:44pm
 
S11 would be a convenient way to extract inductance and capacitance using the following equations:

Please refer to page 8 of https://github.com/promach/frequency_trap/blob/development/s_parameters_of_passi... for more info

All the circuits source and raw calculations (.wxmx file) could be found in the same github repo as well.

This is an example where I am using 1nH inductor.




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blue111
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Re: Question about gyrator implementation of active inductor
Reply #10 - Apr 14th, 2018, 7:53am
 
danmc wrote on Apr 10th, 2018, 9:45am:
Apply a test voltage to IN, call it Vin.  
Vout = -gm1 * Vin * (1/(CL*s)).
The current you get back is
Iin = gm2*Vout = gm2*(-gm1)*Vin/(CL*s)

Now solve for Zin = Vin/Iin = Cl*s / (gm2*(-gm1)) and in your case this becomes
Zin = (0.07pF/(-20mS*-20mS)) * s  = L*s
this gives L = 175 pH.

so is that what you get via simulation?



I am not getting 175 pH as my S11 simulation result. Could you advise why ?

https://github.com/promach/frequency_trap/blob/development/s11_gyrator.log#L6





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« Last Edit: Apr 15th, 2018, 12:14am by blue111 »  
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danmc
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Re: Question about gyrator implementation of active inductor
Reply #11 - Apr 16th, 2018, 5:07am
 
Rather than use calculations to find S11 and then more calculations to find Z and then Leq, why not just directly measure Z in simulation?  It is simpler.  Either should work, but you're making it harder than it needs to be.  Reasons to use s-parameters at all for something like this would be things like, that is what the simulator gives natively (not true in your case), or you are doing real measurements on real components at RF frequencies with a VNA.  In that second case, you are again in the case where s-parameters are what the instrument wants to give you so that is what you work with.  But for a spice-like simulator, no reason to not directly measure Z=V/I or Y=I/V and work with that.

As to what is wrong, again, make it simpler.  Put an inductor in place of that active block in your schematic (not just a calculated result into your spreadsheet).  Make sure that you get the correct result.  If you don't, then it points to a problem with your netlist (for something simple like this, *look* at the netlist.  Does it make sense?  Do you have a sign flip somewhere?  A control vs output node switch somewhere? ) or a problem in your post processing.

For the example output numbers, it is no wonder your inductance is off because the S11 value you start with is not correct for an inductance.  You're completely on the wrong side of the smith chart.  For an ideal inductor, you start off with zero impedance at zero frequency which places you at S11=-1.  This is on the unit circle on the smith chart, clear over at the left side and on the real axis.  As frequency goes up, you move clockwise around the smith chart and don't get to +1 until infinite frequency.  Your number places you near +1 but on the lower half which with a real inductor (one with a self resonant frequency) means you're operating past resonance.  Or it means you failed to insert the inductor into your test fixture or make good contact and you just have a small capacitance.  Again, the troubleshooting is done by simplification.  Do open circuit, short circuit and Z0 load standards all give the correct results?  If not, fix that problem first (bad cable?).  In simulation it is the same.  Do elements with exactly known results give the result you expect?  If not, then the test setup is broken.  Once the test setup is proven out, take it a step towards what you really wanted to check.  In the lab, try a different inductor, maybe you had a bad one.  In simulation, move from the ideal inductor to the vccs version of the gyrator.  

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blue111
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Re: Question about gyrator implementation of active inductor
Reply #12 - Apr 20th, 2018, 11:06pm
 
I think I might have found the root cause of wrong S11 result due to mistaken output port

How should I modify the gyrator circuit such that one of the inductor terminal is not connected to GND ?

http://tnt.etf.bg.ac.rs/~ms1aik/AIC-15-Active-Inductors.pdf#page=2

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blue111
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Re: Question about gyrator implementation of active inductor
Reply #13 - May 1st, 2018, 5:56pm
 
I have solved the previous wrong S11 result issue.

Besides, could I see intuitively how the following Zin equation comes about without deriving it step-by step ?



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Re: Question about gyrator implementation of active inductor
Reply #14 - May 3rd, 2018, 6:15am
 
blue111 wrote on May 1st, 2018, 5:56pm:
I have solved the previous wrong S11 result issue.

Besides, could I see intuitively how the following Zin equation comes about without deriving it step-by step ?

https://i.imgur.com/NYJ6Jvk.png



sure.  The first gm stage plus CL forms an integrator.  What is it integrating?  The voltage at node X.  The second gm stage completes a feedback loop which tries to keep the voltage at node X held constant at the point where you get no output current from the first gm stage.  If you inject a current into node X, the feedback loop will respond to adjust the voltage on CL until the 2nd gm stage absorbs all of that current.  This gives you a low impedance at low frequencies.  How low?  Just 1/(gm1*rout1*gm2).  I.e. 1/total_gm.  What happens at high frequencies?  CL becomes low impedance effectively removing the effect of the feedback loop.  Now the impedance you see is high.  How high?  Ignoring capacitances associated with the gm stages, Rout2.  So you have a low impedance at low frequencies that becomes high impedance at high frequencies.  That is an inductor.   For the two break frequencies think about it this way.  At very low frequencies, Rout1 has a lower impedance than CL and it isn't until Rout1 = |1/(j*w*CL)| that you start to see appreciable effects from CL.  That is just w = 1/(Rout1*CL).  At the high frequency end, you can solve for when the inductive part equals Rout2, or you can disconnect node X from all but the gm stages and realize that CL sees a resistance of 1/(gm2*Rout2*gm1) and so the pole frequency is 1/(gm2*Rout2*gm1).   Note that this analysis and the plot you show both ignore the effects of capacitances associated with the transistors in the gm stages.  Those will be important at some point.
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