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PLL design in virtuoso (Read 425 times)
pashtp
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PLL design in virtuoso
Feb 21st, 2018, 12:25am
 
I am designing basic PLL in virtuoso. I am giving reference signal as square wave but getting output at the VCO as sine wave so how PFD will compare two different i.e sine and square waves? Divider ckt is also not giving square wave.
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Jacki
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Re: PLL design in virtuoso
Reply #1 - Mar 14th, 2018, 12:55am
 
you can easily add a buffer after your oscillator to change the sine wave to square wave. It is really interesting why you cannot get the square wave after the divider.
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pashtp
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Re: PLL design in virtuoso
Reply #2 - Mar 14th, 2018, 10:50am
 
Hey thanks Jacki. It worked. Yeah i am also wondering why i am not getting square wave after divider. Now i am getting square wave but there is still phase difference, what should i do now?
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Jacki
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Re: PLL design in virtuoso
Reply #3 - Mar 15th, 2018, 1:03am
 
Hello,

   I think it depends how you design your clock divider. Normally it is based on DFF, so the output should be square wave. If you use other analog solution to get your frequency divider, probably you get the sinewave at the output, but it is large signal, I don't know which kind of circuit can give you the sinewave with such big output swing.
   About the phase difference, it is normal to have the phase offset (you can consider it as DC offset). With the phase offset (constant phase difference), your PLL is still locked and works. If you use charge pump based PLL, you may get spurs at the output spectrum. If you want to remove the phase offset, you need high enough loop gain, and matching current sources in your charge pump.
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pashtp
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Re: PLL design in virtuoso
Reply #4 - Mar 15th, 2018, 10:32am
 
Hi Jacki,

Thanks for the help. It was really helpful. I will check my charge pump design. Can you suggest any book or online material for PLL design?
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