Hello,

I'm trying to simulate a 18-bit SAR ADC with both AMS and spectre + nclauch.
In the simulation with AMS, some of the digital blocks are realized by using verilog and simulated together with the analog blocks. In the simulation with spectre + nclaunch, the output of the analog blocks from spectre simulation is stored and used in the pure digital simulation with nclaunch.
Spectre + nclauch simulation shows a SNDR of about 16.3-bit while it is less then 10-bit in the ams simulation.
I found that there were some errors in the comparator for the ams simulation as the CDAC settling to a small residual.
I'm wondering if there is something missing in my ams simulation since people say spectre and ams provide the same accuracy.
http://www.designers-guide.org/Forum/YaBB.pl?num=1492517241

I generated a very simple simulation to see if there is any accuracy difference between them. Then I did see some, as shown in the attached file.


Netlists in both cases are attached below. The inverter was realized in veriloga for spectre simulation and in verilog for ams simulation.

///////// spectre nestlist///////////////

simulator lang=spectre
global 0
include "process_device_model.lib" section=tt


V0 (net4 0) vsource type=pulse val0=0 val1=1.2 period=1u rise=1n fall=1n \
       width=400.0n
C2 (net07 0) capacitor c=1p
C0 (net01 0) capacitor c=2.5p
R1 (net3 net7) resistor r=1K
R0 (net4 net01) resistor r=100K
NM0 (net7 net01 0 0) n12ll w=1u l=60n nf=2 as=155f ad=95f ps=2.62u \
       pd=1.38u nrs=95m nrd=95m sa=155n sb=155n sd=190n sca=0 scb=0 scc=0 \
       m=1
V1 (net3 0) vsource dc=1.2 type=dc
I5 (net07 net010) inv0 td=2e-10 tt=2e-10
E0 (net010 0 net7 0) vcvs gain=1.0
simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=30.0 \
   tnom=27 scalem=1.0 scale=0.9 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \
   digits=5 cols=80 pivrel=1e-3 sensfile="../psf/sens.output" \
   checklimitdest=psf
tran tran stop=3u errpreset=conservative step=1n write="spectre.ic" \
   writefinal="spectre.fc" annotate=status maxiters=5
finalTimeOP info what=oppoint where=rawfile
modelParameter info what=models where=rawfile
element info what=inst where=rawfile
outputParameter info what=output where=rawfile
designParamVals info what=parameters where=rawfile
primitives info what=primitives where=rawfile
subckts info what=subckts where=rawfile
saveOptions options save=allpub
ahdl_include "./test/inv0/veriloga/veriloga.va"

////////////// ams netlist///////////////

`include "disciplines.vams"
`include "userDisciplines.vams"

`timescale 1ns / 1ns

(* cds_ams_schematic *)
module amstest1 ();


vsource #(.type("pulse"), .val0(0), .val1(1.2), .period(1u), .rise(1n),
   .fall(1n), .width(400.0n)) V0 (net4, cds_globals.\gnd! );

capacitor #(.c(1p)) C2 (net07, cds_globals.\gnd! );

capacitor #(.c(2.5p)) C0 (net01, cds_globals.\gnd! );

resistor #(.r(1K)) R1 (net3, net7);

resistor #(.r(100K)) R0 (net4, net01);

n12ll #(.w(1u), .l(60n), .nf(2), .as(155f), .ad(95f), .ps(2.62u),
   .pd(1.38u), .nrs(95m), .nrd(95m), .sa(155n), .sb(155n), .sd(190n)
   , .sca(0), .scb(0), .scc(0), .m(1))
(* integer passed_mfactor = "m"; *)
NM0 (net7, net01, cds_globals.\gnd! , cds_globals.\gnd! );

vsource #(.dc(1.2), .type("dc")) V1 (net3, cds_globals.\gnd! );

inv0 I5 ( .out(net07), .in(net010));

vcvs #(.gain(1.0)) E0 (net010, cds_globals.\gnd! , net7,
   cds_globals.\gnd! );

endmodule




`include "disciplines.vams"
`include "userDisciplines.vams"

module cds_globals;

// Global Signals
  electrical \gnd! ;
  ground \gnd! ;

// Design Variables

endmodule

// This is the Cadence AMS Designer(R) analog simulation control file.
// It specifies the options and analyses for the Spectre analog solver.

simulator lang=spectre

global 0

simulatorOptions options temp=30.0 tnom=27 scale=0.9 scalem=1.0 \
reltol=1e-3 vabstol=1e-6 iabstol=1e-12 gmin=1e-12 rforce=1 maxnotes=5 \
maxwarns=5 digits=5 pivrel=1e-3 checklimitdest=psf

tran tran stop=3u errpreset=conservative step=1n write="spectre.ic" \
writefinal="spectre.fc" annotate=status maxiters=5

finalTimeOP info what=oppoint where=rawfile

modelParameter info what=models where=rawfile
element info what=inst where=rawfile
outputParameter info what=output where=rawfile

wave_out options rawfmt=sst2



amsd{
   ie vsup=1.2 discipline=logic
}

# This is the NC-SIM(R) probe command file
# used in the AMS-ADE integration.


#
# Database settings
#
if { [info exists ::env(AMS_RESULTS_DIR) ] } { set AMS_RESULTS_DIR $env(AMS_RESULTS_DIR)} else {set AMS_RESULTS_DIR "../psf"}
database -open ams_database -into ${AMS_RESULTS_DIR} -default

#
# Probe settings
#
probe -create -emptyok -database ams_database {amstest1.net4}
probe -create -emptyok -database ams_database {amstest1.net7}
probe -create -emptyok -database ams_database {amstest1.net07}
probe -create -emptyok -database ams_database {amstest1.net01}


Could anyone tell me what I missed in my simulation?

Thanks,
Quan