Hello,

1- Would you please tell me how would you describe the difference between fingers and multipliers in MOS transistors?
I created two NMOSs one (l=60n, W=5u, #of finger=4) another (l=60n, W=5u, #of multiplier=4). The first one is single MOS with a W of 20u while it is fingered. The second one consists of four individual MOSs.

2- When it comes to the design of current mirrors, which one must be used? finger or multiplier? let's say the reference current of a simple current mirror is 1uA and we want to duplicate it by a factor of 4 to mirror it as a 4uA current source. Now we have to use finger=4 or multipliier=4?

3- In terms of noise, the distributed gate resistance in a fingered MOS is divided by a factor of 3? What happens for multiplier transistors?


Thank you

1 - multiplier m creates m copies of the device specified. If you specify 1 device with W/L = 5u/60n, then you will create m seperate copies of 5u/60n. So, for example, if you wired these in parallel for a current mirror, you would have an effective gate width of m*5u. Fingers n specifies the number of fingers, or divisions of the gate width to be patterned. As you can see in your picture, with n fingers, the gate width of 5u is split up into 4=n rectangles of width W/n (in this case n=4, W=5u, W/n=5u/4=1.25u) and length of 60n. With fingers, you have a single device with a total width of 5u and length of 60n, but instead of one large rectangle for the gate, you have n smaller rectangles. Each of these rectangles have a channel underneath, and the drain and source to the sides of these rectangles are shorted because they share a diffusion layer. The device is then wired with metal layers to connect all the drains together with the source. If you try wiring this in layout you'll notice the diffusion areas alternate from drain to source as you traverse the device from right to left. Important distinction between multiplier and finger is that fingered devices share diffusion layer while multiplied devices do not. This is important for layout matching, since the edge of the diffusion will be pinched by the boundary, thus affecting its electrical properties. Not too well versed on this topic but my guess is piezo effects and differences in temperature coefficient in the process flow may affect the edges more than the center.

2 - Current mirrors can use a combination of both. Current mirrors need to be matched well, so this implies a large L (which really doesn't have much to do with the m or n factor). You want to avoid a high aspect ratio (large W with respect to L or vice versa) because then you get a wide or tall rectangle. This can cause ESD or antenna violations in DRC. Moreover, the edge effect I discussed earlier is prominant for one sole device without neighbors. This is why fingers are preferred for current mirrors where matching is paramount. Most of the S/D regions are symmetric with high finger count, helping matching from gate to gate. With multiplied devices, layout engineers will often add a dummy device in the middle to create this symmetric effect.

3 - I don't have a good answer for you, but I would suggest looking at effective capacitance of the gate to source/drain with different n and m numbers. This sounds like a good exercise. I would imagine with a high finger count n, there will be more metal routing, and therefore more parasitic coupling capacitance between nets.

Hope this helps! Sorry I couldn't answer every question.