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Testing a High Speed Differential TIA (Read 65 times)
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Testing a High Speed Differential TIA
Aug 09th, 2017, 11:42am
I am designing a broadband amplifier in CMOS - it is a transimpedance amplifier (TIA) - and it is differential (running at 40gb/s with a bandwidth of about 0.7 * 40 gb/s = 28 GHz).

I am wondering about the testing of differential high speed amplifiers using S parameters in the Cadence Spectre ?  What would the test bench look like ?  Would I use a balun ?  

The input is a current from a photodiode since this is for optical applications.

It is a simple shunt feedback TIA but driven differential - I have attached a picture.
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Ken Kundert
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The Spectre

Posts: 2064
Silicon Valley
Re: Testing a High Speed Differential TIA
Reply #1 - Aug 11th, 2017, 10:21am
The testbench is a simplified model for the 'rest of the circuit' or the circuit with the DUT removed. You are asking about the testbench but showing us the DUT. If you want help on the testbench, you have to tell us about the rest of the circuit. Specifically, how are you going to drive the inputs and load the outputs.

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