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AMS_ei Community Member Offline Posts: 67	Singular matrix warning for a global net Mar 11^th, 2017, 8:06am Hi, I have a global net in SPICE netlist. When I run spectre with this SPICE netlist, it is giving warning on this net as a Singular Matrix warning and not able to achieve dc solution. Is there any special tweak to take care of this? Thank you.
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Ken Kundert Global Moderator Offline Posts: 2384 Silicon Valley	Re: Singular matrix warning for a global net Reply #1 - Mar 12^th, 2017, 11:44pm Have you turned off the topology checker? Does your circuit include Verilog-A code? -Ken
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AMS_ei Community Member Offline Posts: 67	Re: Singular matrix warning for a global net Reply #2 - Mar 21^st, 2017, 8:08pm Hi Ken, Thank you for your valuable inputs. Could you please tell me how can I turn off topology checker? Thank you. Kind regards.
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Ken Kundert Global Moderator Offline Posts: 2384 Silicon Valley	Re: Singular matrix warning for a global net Reply #3 - Mar 22^nd, 2017, 1:44am I was not suggesting you turn off the topology checker. I was asking if you had turned it off. If you turned off the topology checker, then topology errors would be reported as a singular matrix. Your going to have to give more information if you want help. -Ken
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AMS_ei

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Re: Singular matrix warning for a global net
Reply #4 - Mar 22^nd, 2017, 1:29pm

Hi Ken,

Thank you for your interest.

Basically, I have a design in virtuoso and from there, I have extracted spectre netlist using ADE-L. Now, I am using that extracted netlist in my AMS-setup to run a a mixed signal simulation. I am using ams-spectre as a circuit simulator.

I am running irun from command line option and configured it as use=spice in the amsd block.

There is a global net in the extracted netlist. That net is causing the issue with "Singular matrix warning" and after that dc solution is not achieved in a transient analysis.

Could you please comment on this.

Thank you.

Kind regards.

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Ken Kundert

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Re: Singular matrix warning for a global net
Reply #5 - Mar 22^nd, 2017, 4:13pm

Thank you for that information, but none of it is relevant. A singular Jacobian results from trying to simulate a degenerate circuit. So your challenge is to try to identify the degenerate part of your circuit. I recommend you look at that global net and see if there is anything unusual about it or the things that connect to it. This is why I asked about Verilog-A. A bad Verilog-A model may result in a singular Jacobian, but I have also seen people create singular Jacobians using loops of controlled sources. You can also try splitting the net in an attempt to identify the problem.

-Ken

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