Hi, everyone.
Could anyone help to give a discussion about comparator offset, propagation delay, and hysteresis related to comparator design?

1. Offset is defined as the input difference when the output changes at the comparator input difference becomes larger than zero.

2. The propagation delay is defined as the average of rising propagation delay time and falling propagation delay time. The rising or falling propagation time is the time difference between the mid-value between VOH and VOL and the mid-value between VIH and VIL when applying a step input signal to one node and keeping the other input node in VCM. And the propagation delay is positive proportional of input difference. If the step value is larger than the comparator resolution, the propagation time becomes smaller without slew rate limitation.

3. The hysteresis is defined the difference between two different input threshold voltages, Vtrip+ and Vtrip- in a noisy environment.

No one comes over to write a little.

After reading some tutorials and applications, I think by myself and get the following conclusion (If you think it is wrong, please point out. Thank you )

1. Hysteresis is related to comparator function in noisy environment. Hysteresis is the range between the up trip point to low trip point.
2. Offset is related to process or random variation affecting the comparator threshold. Offset is a single-ended value, which means it shifts the ideal threshold value up and down.

BTW, I was thinking another question: the hysteresis is testing by applying a triangular input signal to one input node and keep the other one constant. If changing the triangular slope (rising or falling), the trip point should be changed, yes? Does that mean the hysteresis is not constant?

Thank you.

I would like you to be more concise in the same post. If you would like to build a comparator with a hysteresis, then you can think of a topology based on what kind of supply you have.

If you have dual supply +VDD and -VDD, then it's easier to design using the usual topologies mentioned online which has an opamp driving a resistor divided in its feedback to its positive terminal. The input is given to its negative terminal.

But if you have only a single supply, then there are a couple of ways you can do this :
1)http://louissimons.com/blog/implementing-comparators-with-hysteresis
2) Switch your reference based on your output using switches. Select a lower reference the moment your input crosses the upper threshold. When your input crosses your upper threshold, your output will be high or low based on your design. So select the lower reference using your outputs.

Now rise fall times of the outputs depend purely on the driving capability of your inverter in the output.

Now that you need to only design the opamp, you use a simple differential amplifier followed by a common source stage. Why two  stages? Because you need gain. Why CS output stage? Because you need rail to rail swing which nothing else can provide. You can have inverters followed by CS which can boost the switching. You don't care about the stability of the circuit because this is inherently made a positive feedback circuit.

What are the challenges? You need to design the opamp input pair/current sources to be in saturation for the ranges of common mode, which is the Vih and Vil.

Now if you select architecture 1) then your vih and vil are function of your supply and hance you need to be careful while simulating and assuming their values. In the 2) you could generate a reference based on IR which will have random variation rather than systematic variation.

Check your opamp input referred offset which will also decide your effective Vih and Vil.