I am facing an issue with simulator (APS liberal) missing intermediate points on the edge for edge-triggered D flipflops.

I have a design with sequences of D-Flipflops, which effect the state of the outputs. These flipflops are edge triggered.

With Transient liberal settings, the timestep taken by APS(spectre) are not capturing the minimum three points in the input of the D-flipflops everytime. It is giving many times just two points of the changing state and missing an intermediate point. This proves that the time-step algorithm is not able to resolve the points needed to correct operation correctly.

As a solution of this, I am attaching a dummy verilog-A to the inputs of  D-flipflops and enforcing a point by @cross event. With Verilog-A, I dont have to change simulator settings and hence I am saving simulation points that way.

Is there a better solution than using the dummy Verilog-A?
Please no answers on updating relref/lteratio.