The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Apr 19th, 2024, 5:41am
Pages: 1
Send Topic Print
Rules and conditions enforced on signal-flow systems (Read 1773 times)
JayOcad
New Member
*
Offline



Posts: 8

Rules and conditions enforced on signal-flow systems
Sep 08th, 2016, 12:51pm
 
What rules or conditions are enforced on signal-flow systems if any?

I read that potential signal-flow systems don't enforce KFL, is KPL enforced or are there just absolutely zero conditions imposed on signal-flow systems and flow and potential have no difference?

I searched around for days and went through the Verilog-ams books but for the life of me can't find the list of conditions that the solver/compiler enforces when only one nature is specified for signal-flow systems.

Many thanks.
Back to top
 
 
View Profile   IP Logged
Ken Kundert
Global Moderator
*****
Offline



Posts: 2384
Silicon Valley
Re: Rules and conditions enforced on signal-flow systems
Reply #1 - Sep 8th, 2016, 11:48pm
 
No rules, no conditions. The only difference is you cannot access the missing nature.

-Ken
Back to top
 
 
View Profile WWW   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.