I am brand new to verilog-A and cannot seem to get $fdisplay statements to work in conjunction with $finish. I have the following code (header and variable declarations not shown):
Code: analog begin
@(initial_step) begin
fh_1 = $fopen("./va_output_1.log");
$fdisplay(fh_1, "starting verilog-A module\n");
end
@(cross(V(test_signal)-threshold, -1)) begin
test_signal_falling_edge_time = $abstime/1p;
test_signal_falling_edge_value = V(test_signal);
test_signal_threshold_detected = 1;
$fdisplay(fh_1, "test_signal falling edge detected at t=%f ps, value=%f V\n", test_signal_falling_edge_time, test_signal_falling_edge_value);
end
@(timer($abstime, test_signal_sample_period)) begin
if (test_signal_threshold_detected == 1) begin
$fdisplay(fh_1, "threshold detected\n");
$fflush(fh_1);
$fclose(fh_1);
$finish;
end
end
end
Basically I want to monitor the value of test_signal, and then when it falls below a given threshold, perform the actions inside the timer loop, then exit. For now, the only action in the timer loop is to print that the threshold was detected, then exit.
The problem I am having is that the $fdisplay statement inside the timer loop is not making it into the output file. All other $fdisplay statements are writing their output to the file.
If I remove the $finish statement, then the $fdisplay statement inside the timer loop does write its output to the file. I am not sure why the inclusion/exclusion of $finish would affect whether or not the $fdisplay statements work.
The inclusion of $fflush and $fclose don't seem to make any difference.
If I check the spice log file, I can see that the $finish statement is being reached:
Code:$finish in mode 64 at time 5e-08
Does anyone know what is going on here?