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Reduced simulation speed of 'only analog' blocks in cadence AMS Vs Spectre (Read 1846 times)
ananya
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Reduced simulation speed of 'only analog' blocks in cadence AMS Vs Spectre
May 30th, 2016, 7:57pm
 
Hello!

I am simulating a continuous time sigma delta ADC in cadence virtuoso and AMS environment. I am trying AMS simulator  as i am going to add a few digital blocks on the go. However, i noticed that the same schematic runs too slow with an AMS environment.This is the case, if i operate the ADC with a dual supply. With a single supply, simulation speed is equivalent in both.

Could anyone suggest something?

With regards,
Ananya

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ananya
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Re: Reduced simulation speed of 'only analog' blocks in cadence AMS Vs Spectre
Reply #1 - May 30th, 2016, 11:10pm
 
I found out the issue. In the view list of config view, my default order was veriloga,..., schematic. There were a few veriloga blocks in the system which were getting preference over schematic. In the veriloga model, 0 and 1.8V numbers were mentioned. This was causing problem when I used dual supply(+/-0.9V).
But, spectre, by default choses all schematic views.
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