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frequency spectrum of clk jitter in pnoise simulation (Read 1373 times)
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frequency spectrum of clk jitter in pnoise simulation
May 26th, 2016, 6:17am
 
Hi, I have a question about jitter simulation in cadence pnoise. When I plot Jee of a clock generated by a few inverters and a driven source after completing both PSS and Pnoise, I seem to be able to plot the phase noise frequency spectrum beyond fs. I don't understand why since phase noise should only be valid from 0 to fs/2. I did prove that the spectrum looks the same around 0, fs, 2fs, 3fs.... However, what is the engine underneath pnoise jitter jee? Why is it plotting beyond fs/2? Thanks.
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