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Output buffers for an LC VCO (Read 3841 times)

iVenky Senior Member Offline Posts: 101 Silicon Valley	Output buffers for an LC VCO Apr 30^th, 2016, 10:50am Hi! I am designing an LC VCO and would want to design output buffers for driving the output for testing. What's the general architecture for the output buffers? Can it be differential? I have seen some architectures where they use class A amplifier but I would like to know what is used generally. Thanks!
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raja.cedt Senior Fellow Offline Posts: 1516 Germany	Re: Output buffers for an LC VCO Reply #1 - Apr 30^th, 2016, 1:17pm Diff pair with LC tuned load.
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rfmagic

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Re: Output buffers for an LC VCO
Reply #2 - May 25^th, 2016, 2:03pm

It really depends on the operating frequency but a good choice would be a series of push-pull (inverting stage) stages. This way you make sure the signal is rail-to-rail. on the other hand you get a a square wave with high harmonic content. so unless you need a clean sine wave, I would choose the inverting stages.
It works fine for me up to 15GHz in 65nm CMOS

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raja.cedt

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Re: Output buffers for an LC VCO
Reply #3 - May 30^th, 2016, 1:54pm

Dear rfic-
I would go with inverting stage if I have to buffer it internally like clock tree fashion, but if you have to bring it out and test-it with for a process maturity info or in case test-chip, you might be having some troubles with 50ohm. That's why Generally people tend to go cml buffer or a open drain structure. Correct me if I am wrong.

Best Regards,
Raj.

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rfmagic Community Member Offline Posts: 64	Re: Output buffers for an LC VCO Reply #4 - Jun 15^th, 2016, 1:27pm @ raja I agree with your argument. I probably missed the point that this buffer should be used for low impedance load for testing. Thanks for your correction
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