Why gm/id  methodology is named so? Why not gm*id or gm/id^2?
And Why are the transistors treated as width independent when we extract parameters

Hi guys,

Taking the advantage of this post I would like to ask a few questions regarding this method.

I have access to a few books and papers regarding this method and I have read them, although not intensively, as for an example: Binkley, Jespers and Sansen. Regarding other resources some papers from the same authors and some slides from different courses including the lecture from EE240 Berkley course.

That said the very first question that I have is about where is this method applied after all? To the EVK model or to either EVK or BSIM? The idea that I got from my reading is that the books are referring to the EVK model because this model was built based in this kind of approach and has a factor named IC which is a very important parameters for the design.

On the other hand, the feeling that I got after looking into the slides and the EE240 lecture is that people using BSIM model tried to adapt this methodology (thought for the EVK model) to this very well known BSIM model.

The other feeling that I got was that those who are using this methodology for the BSIM model are tricking the model and the methodology, that is, how can we adapt this methodology thought for the EVK to, to the BSIM?

So get a bit ahead of possible answers and to take the advantage of the users that will take a few minutes from their time to answer me, I will ask other questions based in possible answers.

So, if this can be applied to the BSIM model why is that in some classes that I mentioned above, they don't use the IC factor?

If this can be applied to the BSIM model why there is nobody with papers or books approaching the Analog Design using this method applied to the BSIM model?

The user raja.cedt mentioned the V* and that is precisely what's being used in the EE240 class. I watched that class and read their slides but I didn't get why the are using that V*. What that means? The feeling that I got was that his V* is just a mask for the Vov, because from what I understood the V* is simple Vov that is, Vgs - Vt. If it's like I am saying why changing the name?

This kind of methodology can be used to design any type of circuit? Can I design a current mirror, folded cascode amplifier, two-stage amplifier, comparator, current source generator, band=gap voltage generator, LDOs, etc?

Regards and sorry for the size of my post.

basically gm/id has been developed to remove the model dependency on the design. Often people (all the designers) use square law to find parameters, but the results are very far because no body knows the power vgs-vt term in the drain current equation. In gm/Id method once you have set of curves been developed for the technology, once you are done with data, use can use pretty all of the device sizing's (of course still you need some tweaking due to 2nd order effects).

EKV and BSIM two different approaches to model a real time device, like any model EKV use inversion coefficient where as BSIM use's another parameter (I forgot the algorithm but you can read in google). In-fact now a days people are moving to nxp PSP model.

Vstar and Vov: With the square law you can define Vou as sqrt(2*I/beta) which is the required vgs-vth for a particular current. But with a non square law device you can't use equation any more, so people started using vstar (which has no mathematical significance) which had been extracted form sims.

Hope this helps,
Raj.

Vstar=Vgs-Vth

generally you will have to plot gm/Id against a gm/gds or Ft or I/W. So get gm/id and gm/gds for a Width and plot in xls or matlab.

raja.cedt wrote on May 23^rd, 2016, 9:08am:


in ee240, Vstar is defined as 2*ID/gm, in this way it does not necessary equals Vgs-Vth in youtube ee240 lecture4 or 5