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iVenky

Senior Member

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Posts: 101
Silicon Valley

How to reduce the MOSFET OFF capacitance
Apr 09^th, 2016, 12:29pm

Hi,

I am trying to design a capacitor bank for VCO. The thing is the MOSFET switches give a considerable OFF cap when they are OFF because of which I am seeing a reducing the capacitor range in the bank. I would like to reduce this OFF capacitance of the MOSFET and I don't want to reduce the size further because this would increase the ON switch resistance. Is there any technique to reduce this capacitance?

Please let me know if you have any questions.

Thanks!

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ULPAnalog Community Member Offline Posts: 97	Re: How to reduce the MOSFET OFF capacitance Reply #1 - Apr 9^th, 2016, 1:31pm Does using capacitance neutralization techniques such as negative miller compensation help?
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iVenky Senior Member Offline Posts: 101 Silicon Valley	Re: How to reduce the MOSFET OFF capacitance Reply #2 - Apr 9^th, 2016, 3:24pm But you need an amplitude for that negative miller capacitance. When you so many capacitor banks, that would be a good solution, right?
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ULPAnalog Community Member Offline Posts: 97	Re: How to reduce the MOSFET OFF capacitance Reply #3 - Apr 9^th, 2016, 3:49pm iVenky wrote on Apr 9^th, 2016, 3:24pm: But you need an amplitude for that negative miller capacitance. When you so many capacitor banks, that would be a good solution, right? What is this amplitude?
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iVenky Senior Member Offline Posts: 101 Silicon Valley	Re: How to reduce the MOSFET OFF capacitance Reply #4 - Apr 10^th, 2016, 5:59pm Sorry it was a typo, I meant "amplifier"
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ULPAnalog

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Posts: 97

Re: How to reduce the MOSFET OFF capacitance
Reply #5 - Apr 10^th, 2016, 8:03pm

OK. That might be possible. But it is not entirely clear to me on which part of the off state capacitance is causing the problem and henceforth between which nodes would you insert compensation stage. Can you simplify the problem by reducing the switch sizes and counter the increased on state resistance by gate bootstrapping or using a charge pump to boost gate over drive (I consider bootstrapping a variant of charge pump).

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DanielLam Community Member Offline Posts: 76	Re: How to reduce the MOSFET OFF capacitance Reply #6 - Apr 29^th, 2016, 11:39pm Can you use a higher common-mode voltages on the capacitor lines? You might try that.
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raja.cedt

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Posts: 1516
Germany

Re: How to reduce the MOSFET OFF capacitance
Reply #7 - Apr 30^th, 2016, 1:25pm

HI-
What kind of architecture you are using. is it a simple Cap in series with grounded switch or a differential cap connected through floating switch? You can use RC filter based common mode shifting technique (refer the following pap) or floating switch tech with side ground switches (Refre Razavi RF book)

http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=1025154&url=http%3A%2F%2Fi...

Best Regards,
Raj.

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BennJoltes

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Re: How to reduce the MOSFET OFF capacitance
Reply #8 - May 25^th, 2016, 11:30am

Hello everyone..i am new here. As per my my knowledge it is not clear to me on which part of the off state capacitance is causing the problem and henceforth between which nodes would you insert compensation stage. Can you simplify the problem by reducing the switch sizes and counter the increased on state resistance by gate bootstrapping or using a charge pump to boost gate over drive.

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