Hi,
I'm new here and in Verilog-AMS modelling with data type wreal.

I propose to simulate a VHDL file with a few Verilog-AMS models (ADC, DAC and a plant transfer function) in irun environment.

1. Can the function @(cross(V(clk)-vth, +1)) be solved by irun  
   simulator?
   If not, is there any simpler way to model behavior of a 10b ADC
   and DAC?
2. How looks like the Verilog_AMS model (with wreal data type) for a
   second order transfer function, sampled by Fs, like this
   H(s)=(s^2+ωz/Qz s +ωz^2)/(s^2+ωp/Qp s +ωp^2)

Thanks a lot in advance!

Cheers!
Adam_N

For an example wreal dac, take a look at http://www.designers-guide.org/Books/dg-vams/ch4/ch4-listing09.tgz

-Ken