The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
May 1st, 2024, 10:46am
Pages: 1 2 
Send Topic Print
Open loop pole-zero analysis of Boost Converters using PSS and PAC (Read 6007 times)
a_k
Junior Member
**
Offline



Posts: 17

Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Reply #15 - Aug 06th, 2015, 9:16am
 
@Ken,

Thank you for your reply.
Back to top
 
 
View Profile   IP Logged
a_k
Junior Member
**
Offline



Posts: 17

Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Reply #16 - Aug 7th, 2015, 6:41am
 
@Ken,

Thank you for your reply.
Back to top
 
 
View Profile   IP Logged
a_k
Junior Member
**
Offline



Posts: 17

Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Reply #17 - Aug 18th, 2015, 11:36am
 
Hi Ken,

I implemented the VerilogA Comparator block discussed earlier with an opamp circuit (transistor level implementation).

The PSS analysis was performed in shooting mode with `q` [output of flip flop] as the oscillator node+. There was only one warning and is given below [2]. The PSS analysis results match well with `trans` analysis results. But the PAC analysis does not seem to work for this boost converter (operating as autonomous circuit). May be some parameter settings are wrong [1]. The voltage gain (Vo/Vi) and phase results are shown below and are incorrect.

Could you please tell me what might be the reason or any suggestion about how to run PAC analysis for this kind of circuit?

Please let me know if any further information is needed.

Thank you in advance.

[1] PSS and PAC settings:
Code:
pss  (  Vo  0  )  pss  fund=161.23k  harms=0  errpreset=moderate
+    tstab=249m  saveinit=yes  oscic=lin  method=gear2only
+    tstabmethod=gear2only  maxacfreq=200M  maxperiods=50  annotate=status
+    maxiters=50
pac  pac  start=1m  stop=200M  maxsideband=0  annotate=status
 



[2] Warning during PSS analysis:
Code:
Notice from spectre during IC analysis, during periodic steady state analysis `pss'.
    GminDC = 1 pS is large enough to noticeably affect the DC solution.
        dV(I33.MP1.m1:int_s) = -474.4 mV
        Use the `gmin_check' option to eliminate or expand this report.
    L0: Initial condition computed for node L0:1 is in error by 1 nA.
        Decrease `rforce' to reduce error in computed initial conditions.  However, setting rforce too small may result in convergence difficulties or in the matrix becoming singular.

DC simulation time: CPU = 300.954 ms, elapsed = 300.762 ms.

Using linear IC

Warning from spectre during periodic steady state analysis `pss'.
    WARNING: Linear IC: Fail to find out initial frequency. [ Early Reject ]
 


Back to top
 

new.PNG
View Profile   IP Logged
a_k
Junior Member
**
Offline



Posts: 17

Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Reply #18 - Aug 18th, 2015, 11:38am
 
The Magnitude and phase plot obtained for Vo/Vi.
Back to top
 

new2.PNG
View Profile   IP Logged
Ken Kundert
Global Moderator
*****
Offline



Posts: 2384
Silicon Valley
Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Reply #19 - Aug 18th, 2015, 3:57pm
 
1. If trying to compute loop gain to determine small signal stability, you should be using the stb analysis rather than pac.
2. Because you are using an autonomous PSS analysis, PAC by default, sweeps frequency starting at the fundamental frequency rather than from DC. You should change this using 'sweeptype=absolute'.
3. You should reduce the frequency range on your sweep.

-Ken
Back to top
 
 
View Profile WWW   IP Logged
a_k
Junior Member
**
Offline



Posts: 17

Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Reply #20 - Aug 21st, 2015, 2:39am
 
@Ken,

Thanks a lot. I got more or less proper magnitude and phase plots after changing the `sweeptype` to `absolute`.

But I am confused about your first point. Should I use `stb` or `pstb` analysis to find the loop gain for this kind of circuit?
Back to top
 
 
View Profile   IP Logged
Ken Kundert
Global Moderator
*****
Offline



Posts: 2384
Silicon Valley
Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Reply #21 - Aug 21st, 2015, 11:25pm
 
PSTB
Back to top
 
 
View Profile WWW   IP Logged
a_k
Junior Member
**
Offline



Posts: 17

Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Reply #22 - Sep 12th, 2015, 11:52am
 
Hi Ken,

As my circuit (attached) has a low frequency pole (about 6Hz); in the PAC form I gave a frequency sweep range as 10mHz to 1MHz. For this frequency range, in the magnitude and phase plot I saw that the curves were dipping near 10mHz. So I decided to give a frequency range of 1fHz to 1MHz in PAC form. The magnitude and phase plot for this frequency range is attached.

There seems to be a very low frequency poles and zeros in the system, which are impractical. This seems to change the magnitude and phase plot characteristics.

PSS and PAC settings:
Code:
pss  (  q  0  )  pss  fund=169.83k  harms=0  errpreset=moderate
+    tstab=300m  saveinit=yes  oscic=lin  readic="readic.ic"  cmin=10f
+    writefinal="readic.ic"  method=gear2only  tstabmethod=gear2only
+    maxacfreq=200M  maxperiods=100  annotate=status  maxiters=100
pac  pac  sweeptype=absolute  start=1f  stop=10M  maxsideband=0
+    annotate=status 



Could you please tell me why the magnitude and phase plots have a strange behavior (curves were supposed to be flat) in the low frequency range (10-7 to 10-4 Hz) which cannot be related to realistic models?
Back to top
 

new_001.PNG
View Profile   IP Logged
a_k
Junior Member
**
Offline



Posts: 17

Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Reply #23 - Sep 12th, 2015, 11:55am
 
The magnitude and phase plot for 10-15 to 106 Hz range:
Back to top
 

mag_and_phase.PNG
View Profile   IP Logged
Pages: 1 2 
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.