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Charge Pump Model (Read 2753 times)
Edjrodj
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Charge Pump Model
Jul 06th, 2015, 6:40am
 
Hi,
I am new to Verilog-AMS. I am trying to learn it as much as I can, so I strted writing model for charge pump. Can You pls tell me, how to implement noise and missmatch in it?
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Geoffrey_Coram
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Re: Charge Pump Model
Reply #1 - Jul 6th, 2015, 7:20am
 
Verilog-AMS allows you to model your circuits at various levels of abstraction: high-level behavioral level to transistor level.  What sort of a model do you want?

Similarly, Verilog-AMS is also supported by various simulators with different "noise" algorithms: spice small-signal noise, transient noise, even I think some specialized noise algorithms for oscillators.  Unless you tell us more about your application, I don't think we can give you specific suggestions.
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Edjrodj
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Re: Charge Pump Model
Reply #2 - Jul 6th, 2015, 7:50am
 
Ok, I have finished schematic design for charge pump, and I performed simulations (on transistor level). I got results for noise, current mismatch, amplitude and phase but I don't know how to include those parameters in my verilog ams model. I have written the basic ideal model but I want to get verilog ams with performance as close to schematic design as possible.

Regards.
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