Hi,

I am a physics diploma student and have designed a 2.5 GHz 8Bit phase interpolator in the 65nm TSMC process.

Depending on the specifications, I require a zero crossing resolution of at least 780fs. To quantify the DNL and INL error of the PI, a resolution of 100fs would be great. During the transient simulations with Spectre it has shown, that even the conservative preset was too inaccurate for this. I use a Verilog-AMS module to determine the settling of the PI, zero crossing (100fs resolution) and sweep through the possible input vectors. This lead to the point, that the simulation time have to be set to 20us.

To receive more or less accurate results, i have to tighten the reltol to at least 1e-8. Otherwise, the results of independent characterization runs are uncorrelated. This lead to simulation times of 6h+ for a single corner with ideal input clocks and power supply. This simulation times are prohibitive for extracted view, noise and mismatch analysis. The through the DNL results computed INL show a drift of the zero crossing of the output signals (~100fs per selection) as well as some randomness of the DNL results in range of up to 0.5-1ps even with the tighten reltol.

An idea was to use a shooting PSS analysis to reduce the simulation time or even the inaccuracy, because an unsettled circuit is impossible if the tstab is high enough.

The evaluation of the delays show now a nonphysical behavior. From my design equal mixed input phases have to lead to an INL error of zero, because no mismatch is assumed. The PSS analyses show non zero results, with a range of 0.3-2 ps. Therefore, I am unsure what is really simulated even if I choose the harmonics up to 25 GHz.

Of course, the results are in a range of round about +- 1ps to the simple transient simulation, but with a run time of 7h+ there is no real benefit for me. Neighter in simulation time nor accuracy. The only benefit for me at the moment is, that i know, that the simulation results are inaccurate up to 2 ps.

Therefore, I am interested, if someone has some experience how I could speed up the simulation without any accuracy lost or even improve the accuracy. The goal is to analyze mismatch effects and noise of the complete phase interpolator. Otherwise, the errors would be overestimated, and with an error window of less than 1.5 ps I can not believe, that it is possible to meet the specification with such overestimation.

PS:
i would be great, if someone can explain how i can simulate the effect of power supply noise induced jitter on such a difficult to simulate circuit.

PPS:
if the function of a phase interpolato is unclear, a very nice introduction is done here: http://www.eecg.toronto.edu/~kphang/papers/2001/pagiam_phase_interp.pdf  

My PI design is a type I PI with resistive loads.

Hi Ken, thank you for your reply and sorry for the a bit short explanation, but a complete description would be very long, so I try to make the problem as clear as possible.

I already use a Verilog-AMS module that determine the zero crossing with the crossing function. The resolution is set by me to round a about 100fs. The problem is, that the transient simulation itself seems to be inaccurate in the scale of several hundret fs to ps.

A clear sign was, that the default conservative settings lead to the problem, that two simulation runs, that only differs in an additional completly independent dummy circuit (inverter or something like that at ideal sources), lead to results with an correlation factor of only 0.296, what mean, that they are really nearly uncorrelated. If I set the maxstep size to 100fs, the DNL and INL error show the expected behavior. What means, that simulations of the same input vectors lead to the same result, if the static drift is eliminated. The only drawbacks are, that the required simulation time exceed 120h and that the output files are several hundred GB large. This make it more or less impossible to view the waveforms. Even the relaxed simulator settings lead to PSF files with >10GB for only several signals.

I have already read http://www.kenkundert.com/docs/bctm98-MSsim.pdf My observations lead to the opinion, that the "Local Truncation Error" is the source of the simulator inaccuracy. With the default conservative settings, Spectre use sometimes step sizes of more than 10 ps. This seems to be too much, because the slew rate is relative low to enable an interpolation with only four input phases. Therefore, the complete waveform of a period is important. This should be also the reason, why even an unlimited crossing resolution would lead to inaccurate results of the determined phase shift/rotation/delay between input and output clocks.

Therefore, i have really big problems to perform jitter analysis, while i have pure simulator variations that are in the range of 0.5-1 LSB. For the DNL and INL error, i know how the results should look like, but for jitter, i have no idear. I have feedback loops with -3dB bandwidths of ~125 MHz (Input shaping) and ~1GHz (active regulated current mirrors). I have absolutely no idea, how they effect the power supply noise induced jitter all together.

With PXF i have the problem, that the variation of the operation point for the current mirrors is quite large (>0.3V), and also the current through the Mixer transistors vary by a factor of 64 over the input vectors. Therefore, i dont really know, if a can perform PXF as an small signal analysis, because the crossing of the clock signals depent on large signal properties/waveform.

I am really perplexed. When i started the design process, i thought, that 1.5 ps phase resolution is challenging, but not really difficult, if you know what you do. I was a bit afraid from mismatch/corners and noise, but not from the simulation itself. There are 10GBit/s and more phys that use phase interpolation. How can they simulate phase interpolators for even higher frequencies with high confidence, that the design meet the requirements for very low BERs under alls circumstances? I can't believe, that they fabricate test chips to determine the final behavior, because the simulations are not accurate enough or too time consuming... Therefore, where is my mistake?

hmm... interesting.

At the moment i have no access to my data, but tomorrow. I have a nice summary of the Spectre settings, and the corresponding correlation factor as well as runtimes.

@PXF:
Yes, i believe, that there are much less problems to get some results. The problem is, that my PSS analysis i have performed yesterday show a nonphysical behavior. The INL error have to be zero for three points per quadrant. The two input vectors with pure mixed phases, and the equal mixed phases.

The pure mixed phases are correct, but the equal mixed phases show an offset in the range of several hundred  fs up to nearly 2 ps. Therefore, the INL is asymmetric, what is not expected from theory. Say please, if i have to say a bit more about my circuit and the theory behind it.

Another point is, that the DNL/INL performance of my circuit increase with the simulator accuracy. With the from me used settings even a factor of two below the theory... The theory is for sinusoidal inputs and ideal circuits. I can explaine this only with the large signal dependency and the nonlinearity/dynamic of the complete circuit over one signal period. The PSS analysis give me even better results... Therefore, i am not able to exclude, that systhematic errors are induced through the setting of the harmonics. I have seen, that the harmonic setting is more or less an maxstep size setting for me. I have had set the harmonics to 25 GHz and see 2 ps steps for every simulation step. (btw. for how many steps is the in the log shown step width used? i have found no answer to this). I have the misgiving, that the PSS mask some effects and idealize the circuit in a way that some minor part of the real behavior is skipped.

It is hard to explaine, but the more i have done with the simulations, the more i think, that it is very easy to screw yourself with the simulator. Therefore, i have more or less no more trust into papers where the circuits are only simulated. You can do tooo much, to recieve a result how you like it, and nobody explaine the circuit plus the simulator in a way that you can really faith the results.... There is always an uncertainty, that the results are tooo positive, and a real circuit would perfome worse.

Btw. perhaps it is interesting, why i am so interested in the accuracy. The PI is intended wo work inside a CDR of a VLSI design, or as the time equivalent sampling clock generator for on chip measurement units. Therefore, a really high confidence about the circuit behavior is required, because it is expected, that the circuit have to operate under noisy conditions and is itself not test able outside a pure testchip.

Not yet. I have no direct access to cadence, and i not really know, if this is wanted.

I believe, that the problem of my supervisors is, that it is possible to get accurate results through low maxstep size settings, or low reltol rates together with pointlocal for example, when you accept 100+h for 10 to 20µs simulation time for the transient simulation of an simple transient. Spectre always state, that the circuit is too small for multithreading. Therefore, APS is also no help, and i am now at an point where i really have no more idear what i can do to solve the problem. (If simulator logs, explanations of the waveforms, code snippets of the AMS module or something else can help, please say it, i will try to answer the questions as good i can.)

If cpu-time, disc space and! licences would be unlimited, no real problem would exist, but of course they are all limited.

Another point is, where to start and where to stop. I also have seen, that even the number of proped signals can have an effect on the results... If  I simulate the same circuit as transient simulation with the same simulator settings, in one run with only a few signals logged, and in a second run mit all! signals logged, sometimes the results differ in the range of up to nearly +/- 1LSB!
If the number of logged signals ist constant, than I recieve always the same result.

Or i also have had the problem, that the export function of the wavefom through visio can destroy the dataformats for the timesteps.. So i have had sometimes, a time frame compressed into a single point in time. So gaps in the waveform exist...

Perhaps i make something really wrong? I am not able to answer it myself, but i really lost the faith into the simulator.

I can only say, that i have really big problems, to simulate the PI without prohibitive high simulation times. And I think a PI is no rocket science circuit. From my point of view, they are relative common today. The only point is, that more or less nobody talk about there PI designs, and how they simulate them. K, perhaps i am not able to perform a good literature research, but most of the time, the people just use PIs and thats it... That is really annoying, because this eliminate the possibility to have a look on the way how other people simulate this circuit.

My hope was, that i make some simple errors, that the RF gurus here see on the first view, because they are related to the simulation of GHz signals.

So sorry, that my reply took so long, but i am not at the office for the next weeks. I am willing to report Cadence my problems, but it is not my decission. I try      to persuade my supervisors, that it is a good idea to contact Cadence.

I have build a minimal test bench to evaluate the accuracy of the different simulation techniques. It have shown, that even the simple mixer stage (RF-transistors) with only ideal sources suffer on simulator inaccuracy. The DNL error between equal spaced phases and the achieved phase spacing is shown in the attachment.

The PSS shooting, harmonic balance and transient simulation have been performed to compare the results. The PSS analysis show both an incorrect behavior from my point of view.  The settings of the simulator are the following:

All:
Sinusoidal stimuli with 90 degree spacing. The different currents through the two branches are a sweep parameter, that depend on the phase selection. Therefore the current through the left branch is always 'total_current/64*Phase_selection' with Phase_select is element [0:64]

Shooting:

• Beat frequency: 250M
• Output Harmonics: 20
• Accuracy Defaults: conservative
• Run transient: Decide automatically
• Delay calculation method: value(delay(?wf1 (vtime('pss "/clk<0>") - vtime('pss "/clk<2>")) ?value1 0 ?edge1 "rising" ?nth1 1 ?td1 0 ?wf2 (vtime('pss "/CLK_N") - vtime('pss "/CLK_P")) ?value2 0 ?edge2 "rising" ?nth2 1 ?td2r0 0 ?stop 4e-09 ?period1 1 ?period2 1 ?multiple t ?xName "trigger") 2.5e-09)

Harmonic Balance:

• Beat frequency: 250M
• Oversample Factor: 4
• Number of Harmonics: 20
• Accuracy Defaults: conservative
• Additional Time for Transient-Aided HB (tstab): 4n
• Harmonic Balance Homotopy Method: default
• Delay calculation method: value(delay(?wf1 (vtime('pss "/clk<0>") - vtime('pss "/clk<2>")) ?value1 0 ?edge1 "rising" ?nth1 1 ?td1 0 ?wf2 (vtime('pss "/CLK_N") - vtime('pss "/CLK_P")) ?value2 0 ?edge2 "rising" ?nth2 1 ?td2r0 0 ?stop 4e-09 ?period1 1 ?period2 1 ?multiple t ?xName "trigger") 2.5e-09)

Transient:

• Stop Time: 8n
• Accuracy Defaults: conservative
• Harmonic Balance Homotopy Method: default
• Delay calculation method: average(delay(?wf1 (v("clk\\<0\\>" ?result "tran") - v("clk\\<2\\>" ?result "tran")) ?value1 0 ?edge1 "rising" ?nth1 1 ?td1 3.95e-09 ?wf2 (v("CLK_P" ?result "tran") - v("CLK_N" ?result "tran")) ?value2 0 ?edge2 "rising" ?nth2 1 ?td2r0 3.95e-09 ?stop 8e-09 ?period1 1 ?period2 1 ?multiple t ?xName "trigger"))

Therefore, i do not believe, that there is a general problem in the way how i use the simulator. Especiall, because there are not completely wrong results.

I also tested the 'ltethstep' variable with a value of 100fs. It have shown, that the step size decrease, but with the default errpreset settings still "random" errors of the phase occurs. I seems, that 'ltethstep' decrease a bit the required 'reltol', but i still require something <1e-5. I think the reltol can reduced from ~1e-8 to something like 1e-7 or so. So no completly different behavior, but the algorithm behind the stepsize seems to work much better, even if there is no speedup.

I wonder how the simulation can provide such wrong results. The Output signal have more or less no components with an higher frequency than the second harmonic. Therefore, the phase should be correct with respect to the second harmonic. Or effect the frequency of the highest harmonic the resolution of the phase?




PS:
In the tar file are also the simulation results of my previously explained testbench with different number of logged signals and with and without a dummy circuit for the default conservative settings and transient simulations.

The figure 'INL_drift_accurate.png' show the drift of the INL error, that is calculated through the DNL error values.

Simulation 41:
max_step_size 100fs
reltol' 1e-6

Simulation 42:
reltol 1e-8

We can see, that for Sim41 theresults are very consistent, when we neglect the systematic error of 1-10fs per phase step. On the other side, Sim42 show an random fluctuation of the results, whereby they are really small. With default conservative settings, the fluctuation is much higher!