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Sigma-Delta DAC implementation in verilog (Read 2850 times)
shalem
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Bengaluru
Sigma-Delta DAC implementation in verilog
Nov 17th, 2014, 11:16pm
 
Hi all,

I am very new to the DAC circuit.I did some research and started to implement the  Multi bit Sigma-Delta DAC.

I am putting in my understanding and implementation.I wish to have the feedback to improve my understanding.

Sigma-Delta DAC includes:
1)Interpolation and digital filter
         Zero stuffing between the sampled input data.
         I used  4 point average digital filtering.I read about FIR filters but not sure of the coefficient values.
2)Sigma-delta modulator
          I used first order modulator which has an accumulator(adds negative feedback to the INPUT ) and a quantizer(which takes the accumulator output and generates a lower-bit word).
          attached the code snippet of modulator.
3)multi bit DAC
               Converts the lower bit word received from modulator to the voltage.


Please provide your comments.
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sigma_delta_mod_code.PNG
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