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Problem on simulating VerilogA comparator model with PSS analysis (Read 3313 times)
AMSA
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Problem on simulating VerilogA comparator model with PSS analysis
Aug 19th, 2014, 7:20am
 
Hi guys,

I never used VerilogA. I am trying to learn that so that I can design a feedback loop using this.

I wrote a small code from a Verilog A tutorial for a comparator.

After implement it, I tried to simulate a simple circuit - Vpulse shaping a triangle wave and a vdc source to see what would appear at the output.

I used a PSS analysis and an error appeared:



It says that PSS doesn't support behavioral models with hidden states. Is that true? There is any way to escape from this error and use PSS analysis?

What is hidden states?
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Ken Kundert
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Re: Problem on simulating VerilogA comparator model with PSS analysis
Reply #1 - Aug 19th, 2014, 10:40am
 
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AMSA
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Re: Problem on simulating VerilogA comparator model with PSS analysis
Reply #2 - Aug 19th, 2014, 2:32pm
 
Hi Ken, I have read what you have posted but to be honest it didn't said nothing to me. That is, I didn't understand how to take the hidden state from the comparator that I was trying to design.

If you could tell me how to change my comparator code in order to eliminate that hidden state I would Appreciate:



And if you don't mind please feel free to highlight the change?

Regards.
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Ken Kundert
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Re: Problem on simulating VerilogA comparator model with PSS analysis
Reply #3 - Aug 20th, 2014, 10:47am
 
I recommend that you not post code using images. It makes it harder to quote the code, which is often needed to help you.

You should change your model as follows:

Code:
analog begin
    @(cross(V(in)-thresh))
	  ;
    V(out) <+ (V(vdd) - V(vss))*transistion((V(in) > thresh), 0, tt) + V(vss);
end 



This will fix several problems in your model, one of which is the hidden state problem. The other problems are:
1. It would output the wrong value at the start of the simulation (before a threshold crossing occurs)
2. You should never pass a continuous signal (in this case either V(vdd) or V(vss)) through a transition function.

-Ken
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