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In what case we mixed analog and digital in Verilog-AMS? (Read 1971 times)
sharpmental
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In what case we mixed analog and digital in Verilog-AMS?
Jun 13th, 2014, 2:18am
 
I used VerilogA for several mix-signal projects, with ADC, DC-DC, instrumentation amplifiers...such things. In my projects there is always a clear partiton between digital and analog modules.
The result is clear, good for function partition, digital engineer could use their familiar tools for verilog, each module could map to final circuit easily...etc.

So I got a question, in what case we should or we have to mixed digital and analog in one model? This is the purpose of Verilog-AMS, right?
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martinm_de
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Re: In what case we mixed analog and digital in Verilog-AMS?
Reply #1 - Jun 20th, 2014, 12:18am
 
Mixing analog and digital sometimes  makes things easier.

E.g.  if you have a simple ADC  with programmable gain,
you  put the gain model  into the  analog part,  since it is analog,
and you  put  the gain  decoder,  which is digital in nature,
also  into the  analog model.

If you have e.g. a  pipelined ADC  where   the digital part collects
all the bits  from the analog part, it may be required to
design the digital part using static timing analysis.

Here, it would be a desaster  to mix mix analog and digital,
you better separate analog and digital.

Makes it also easier to create a .lib  file  for  the  whole block.
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Ken Kundert
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Re: In what case we mixed analog and digital in Verilog-AMS?
Reply #2 - Jun 20th, 2014, 5:59pm
 
Right now your 'analog' blocks are actually mixed signal and you are modeling the digital part of these models with Verilog-A. This is hard and results in slow models. It only makes sense to do that if there is not very much digital to model.

Once you learn Verilog-AMS, it is much easier to write these mixed signal models in Verilog-AMS, and the resulting simulations can be much faster. And of course, it you have significant digital (decoding logic, control logic, etc) it is easy and efficient to throw it in too.

Finally, you can make really powerful testbenches if you use Verilog-AMS as your testbench.

-Ken
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