Dear All,

this is the sample code i am using for simulating analog d-ff with single vclk input.

====================================================
integer x;
analog begin
     @ (cross( V(vclk) - vtrans_clk, +1 )) begin
          x = (V(vin_d) > vtrans);
      end
      V(vout_q) <+ transition( vlogic_high*x + vlogic_low*!x,
                          tdel, trise, tfall );
      V(vout_qbar) <+ transition( vlogic_high*!x + vlogic_low*x,
                             tdel, trise, tfall );
end
====================================================

can somebody give me some idea how to model differential clock (vclk, vclk_bar) d-flip flop?

Thanks
Mahesh