Hello,

   I am facing a critical problem of generating the synchronized clock signals for two analog circuits which have different grounds.
   As shown in the attached figure, the clock generator has the single input clock signal from outside. The clock generator should send two different control signals to two analog blocks. The challenge here is the two analog blocks have different grounds, one (ANA_1) is the same as clock generator, it is fine. But the other (ANA_2) has higher ground voltage, I really don't know how to design the control signal for ANA_2. The control signals for ANA_1 and ANA_2 should be synchronized.
   Does anyone have possible solutions to solve this problem? I appreciate any comments about it, even somebody can tell me this idea doesn't work at all.
   Thank you.

Hello Shady Adly,

   Thank you for your comments. Adding AC coupling cap is a possible solution, but it needs huge size. I still prefer to do it in active way. While the clock signal through AC coupling cap cannot be held, if my period is a little slow, like 500kHz, it may have troubles.
   Thanks again.

Hi,


Why don't you use a level-shifter to get ANA_2? The closest example I could find is this,

http://www.freepatentsonline.com/7102410-0-large.jpg

but its in a patent, so don't use it directly. Anyway the standard design works fine, just can't seem to find it. I think you need to take the outputs from PD1 and PD2, and remove 219, 221, 223, and 225 to get back the standard design. Or just search around for CMOS level shifter and you should find something...


regards,
Aaron

aaron_do wrote on Apr 22^nd, 2014, 5:49pm:


Hello Aaron,

   Thank you very much. I will think how to modify it to my application.