Design Variables in ADE end up in the cds_globals module, and hence can be referred to using an Out-Of-Module-Reference.
For example:
Code:vsource #(.type("pulse"), .val0(0), .val1(2.5),
.period(1/cds_globals.fREF), .delay(0), .rise(100p), .fall(100p),
.width((0.5/cds_globals.fREF)-100p), .fundname("nameREF")) V6 (
CLK_REF, cds_globals.\gnd! );
In this case, I had an ADE variable called
fREF - and you can see that I'm passing it to an instance of vsource (in this case that's a built-in primitive, but it could equally well be an instance of a VerilogAMS module).
So you'd just need to use similar coding in your textual representation of the design. For example, here's what I get in the auto-generated cds_globals module in my case:
Code:module cds_globals;
// Global Signals
wire \VDD! ;
wire \VSS! ;
electrical \gnd! ;
ground \gnd! ;
// Design Variables
dynamicparam real fREF = 25M;
dynamicparam real anotherVar = 2.5;
endmodule
Two variables, fREF and anotherVar.
Regards,
Andrew.