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The Designer's Guide Community Forum › Design Languages › Verilog-AMS › Track&Hold verilog-a code

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Track&Hold verilog-a code (Read 2583 times)

ams2015 New Member Offline Posts: 1	Track&Hold verilog-a code Nov 05^th, 2013, 2:54pm Hi, I have the ideal Track&Hold verilog-a model. Now I have to model the circuit for acquisition time with r and c as parameters. V(vout) = V(vin) ( 1 - e -t/RC) Need some pointers on how to start. Should I use the exp function in verilog-a?
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Geoffrey_Coram Senior Fellow Offline Posts: 1998 Massachusetts, USA	Re: Track&Hold verilog-a code Reply #1 - Dec 20^th, 2013, 1:05pm I would think you'd want to put in some sort of RC network, but I'm not completely sure I understand the equation you're using.
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Ken Kundert Global Moderator Offline Posts: 2384 Silicon Valley	Re: Track&Hold verilog-a code Reply #2 - Dec 21^st, 2013, 12:56am You might try the RF sample and hold: http://www.designers-guide.org/VerilogAMS/rf-models/sh/sh.va. -Ken
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