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The Designer's Guide Community Forum › Design Languages › Verilog-AMS › Encrypting verilog-A model in HSPICE

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Encrypting verilog-A model in HSPICE (Read 2413 times)

yueguoguo New Member Offline Posts: 5	Encrypting verilog-A model in HSPICE Sep 17^th, 2013, 9:41pm Does anyone have an idea about whether HSPICE can be used to encrypt/decrypt a Verilog-A model file. Thanks.
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Geoffrey_Coram Senior Fellow Offline Posts: 1998 Massachusetts, USA	Re: Encrypting verilog-A model in HSPICE Reply #1 - Nov 5^th, 2013, 8:26am There is no encryption in the Verilog-A standard. It might be possible to compile the Verilog-A into a shared object file and distribute that binary file instead of the source code, which isn't really encryption.
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