The Designer's Guide Community
Forum
ForumVerilog-AMSAnalysisModelingDesignTheory
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
May 3rd, 2024, 1:51pm
 
  HomeHelpSearchLoginRegisterPM to admin    
The Designer's Guide Community Forum › Simulators › Circuit Simulators › Regions of operation of transistors in cadence
‹ Previous topic | Next topic ›
Pages: 1
Send Topic Print
Regions of operation of transistors in cadence (Read 3195 times)
gido
Junior Member
**
Offline



Posts: 23
Regions of operation of transistors in cadence
Mar 08th, 2012, 12:04pm  
Hello,
      I would like to know what regions 1, 2 ,3 and 4 stand for in cadence!!
Back to top
 
 
View Profile   IP Logged
Forum Administrator
YaBB Administrator
*****
Offline



Posts: 145
Re: Regions of operation of transistors in cadence
Reply #1 - Mar 8th, 2012, 11:59pm  
Presumably when you say Cadence, you mean Spectre. If so, then you can run 'spectre -h devtype' where devtype is the type of the device you are interested in. Look for the region parameter. It will list out all known regions in order. I believe 1 is the first entry.

-Ken
Back to top
 
 
View Profile WWW   IP Logged
Pages: 1
Send Topic Print
‹ Previous topic | Next topic ›
« Home ‹ Board
The Designer's Guide Community Forum » Powered by YaBB 2.2.2!
YaBB © 2000-2008. All Rights Reserved.
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.