In Star RCXT, for XREF, there are three options: NO, yes, complete. For my design, when i set XREF to yes, cell_type to layout and net_type to schematic, i extracted two netlists from layout: ideal netlist, and spf netlist, and, the ideal netlist and the spf netlist both have correct connection, the same as cdl pre-layout netlist, so, the XA back-annotation is 100%. But when i set XREF to complete, set cell_type to schematic, and set net_type to schematic, the extracted ideal netlist still has correct connection (same as cdl pre-layout netlist), while the extracted spf netlist have some wrong connections relative to the cdl pre-layout netlist.
for example, there are two MOS transistors in cdl pre-layout netlist,
MM1  net1  net2  net3  net4 PM L=1u W=2u
MM2  net5  net6  net7  net8 PM L=1u W=2u
but in the extracted spf netlist, net5 is connected to SRC of M1, not to DRN of M2, and there are lots of such wrong connections (for the case of XREF: yes, there is not any wrong connection), and all the wrong connected instances and nets are related to SRC and DRN node of MOS transistors, such as:
*|NET X1/XI23/Xi45/XI0/NET24
*|I X1/XI23/Xi45/XI0/MM1:SRC X1/XI23/Xi45/XI0/MM1 SRC B 0
*|I X1/XI23/Xi45/XI0/MM2:DRN X1/XI23/Xi45/XI0/MM2 DRN B 0
but in the CDL netlist, NET24 is connected to DRN of MM1 and [color=#0000ff]SRC of MM3 [/color](not to DRN of MM2).

Does anyone met this problem before? and how to solve it?
Please help me, i really need your help, thanks all.