Hi,

It is a very useful thread.

I have few questions, I hope someone can answer.

If someone is designing a clock buffer circuit. The AM noise can be removed by passing the clock output through an ideal VCVS with gain of 1, centred around Vdd/2. Thus, there is only PM noise present in the circuit. Here the sources (time average) method can be used to calculate the phase noise.

But when I use PM-jitter for this circuit, the results are almost 2x compared to sources. Can some one please help in this? Is the method of using VCVS with voltage limit correct?

Thanks