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snr of adc calculation in cadence spectre (Read 2545 times)
kapileshwar
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snr of adc calculation in cadence spectre
Feb 05th, 2011, 11:02am
 
hiiiiiiii

I'm working on sigma Delta ADC
CAN ANY1 PLEASE HELP ME ON WORKING WITH CADENCE SPECTRE FOR snr  CALCULATION

TRANSIENT ANALYSIS DON E WITH
FIN=50HZ  (OSR=64) (SINE WAVE)
FS=12800HZ=CLK FREQUENCY

HOW MANY CYCLES I SHOULD RUN THIS TRANSIENT ANALYSIS??

HOW TO CHOOSE

STROBEPERIOD?
SKIPSTART?
SKIPSTOP?
IN ORDER TO CALCULATE snr
PLEASE HELP ME IN FIGURING OUT THESE VALUES...
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sheldon
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Re: snr of adc calculation in cadence spectre
Reply #1 - Feb 5th, 2011, 6:34pm
 
Kapileshwar,

   The general guideline discussed elsewhere, you can look for the
post but I will walk you through the setup again for you since there
is some new technology to automate the measurement is now
available.

Basic simulation setup, useful for THD and SNDR

1) Using 8192 samples gives you an FFT fundamental frequency of
   about 15Hz

2) Since the input frequency should not be a harmonic of the sampling
   frequency, select the third FFT harmonic 46.875 as the input
   frequency.

3) Since the circuit is an ADC, we will assume that the digital
   outputs settle quickly to the final value of (0, 1) or (0, Vdd).
   So we will not need to set skipstart, skipstop, strobeperiod.
   These are required when using the fourier integral for to
   analyze a DAC or when using the FFT to analyze a continuous
   waveform.
     
      Caution:
      You will need to select the start and stop time for the FFT so
      that the sample occurs when the signal stable. Or be careful
      not to sample when the digital levels are changing.

4) One additional comment, you have not provided any information
   about your circuit. You will need the circuit to reach steady-state
   before starting to the FFT. For example, if the op amps have
   dynamic common mode feedback, the common mode feedback
   level needs to reach steady state.

5) You will need to use the cosine2 window when performing the
   FFT.

6) Some additional comments:
   a) Use the ViVA calculator in IC615, it has a new tool for spectral
       analysis of data converters. It makes the setup much easier.
   b) If you do not have IC615, but have IC61 ViVA, then you can
       use the spectrum Meas function for the measurement.
   c) If you don't have either of those, then let me know and I can
       walk you through the measurement

Advanced Measurement

   Strictly speaking the setup discussed above does not get you
   SNR, it gets you THD/SNDR(SINAD). In "Understanding
   Delta-Sigma Data Converters", Schreier & Temes recommend
   oversampling by 10x to get the noise floor. Using the setup
   above all the tones contain distortion because the cosine2
   window function is used. I increased the sampling rate 32x so
   that the ratio of distortion samples to noise samples is ~1:10.

   Using an FFT fundamental frequency of 0.48828125Hz, 266144
   samples, should give you enough noise samples to measure
   SNR. The input frequency is 49.3164012 Hz for this setup.

   Also, for the SNR measurement you will need access to IC615
   VIVA spectrum toolbox. It automates the calculation, it in this
   case it is quite involved.

   Hope this helps! Let me know if you have any other questions.

                                                          Best Regards,

                                                             Sheldon
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kapileshwar
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Re: snr of adc calculation in cadence spectre
Reply #2 - Feb 8th, 2011, 11:20am
 
hi sheldon,

many thanks for your reply,

your previous post helped me a lot

my design calculation r

input  sinusoidal freq=50hz suppose

clk freq =12800

no.of samples =8192

so (50/12800)*8192=32
(ending upto nearest prime number= 31 0r 33)

so my calcu;ated i/p freq

12800*31/8192= 48.4375 hz

so,its my adc input freq

taking fft 0f 8192 points for 31 i/p sinusoidal clock cycles

leaving strting 10 clockcycles for setelling i'm doin

so i'm trying to find fft of window from

0.206451612 to next 31 cycles.... presently simulating using cadence spectre...



Do my fft spectrum shows up noise shaping????

am i  missing any steps?????

what additional steps shud i follow for better SNR & resolution ????

once again thanks for ur patience & vital information

thank U Smiley
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sheldon
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Re: snr of adc calculation in cadence spectre
Reply #3 - Feb 13th, 2011, 6:14am
 
Kapileshwar,

  I think that it would be better if you took one sample per clock
period. So there will be 31 periods of the input sinusoid during the
FFT period of 8192 samples * 128kHz. The primary options to
improve the resolution are:
1) Lower the FFT noise floor by increasing the number of samples.
2) Tighten the simulator tolerance, usually not required if you are
   already using the conservative error preset

Both will slow down the simulation time. so apply them carefully.

                                                      Best Regards,

                                                         Sheldon
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kapileshwar
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Re: snr of adc calculation in cadence spectre
Reply #4 - Feb 24th, 2011, 2:11am
 

helllllllllo plz hav a look at cadence psd plot of SD modulator


what could be possible reason for spikes at other frequencies?????

I also could nt see perfect noise shaping??????

please help in figuring out the solution
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kapileshwar
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Re: snr of adc calculation in cadence spectre
Reply #5 - Feb 24th, 2011, 2:16am
 
power supply of 1.2v
input sine wave applied now 0.6V {p-p)


i got psd with  psd with harmonics.....

my results r not satisfactory...

my OTA gain 65.35 dB
slew rate 25v/ms

r harmonics due to low slew rate???

how shud i proceed now to hav better psd plot....
what r reasons for harmonics....

please do help regarding designing...please

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sheldon
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Re: snr of adc calculation in cadence spectre
Reply #6 - Feb 24th, 2011, 4:21am
 
Kapile,

  You a basic issue since the output does not show any shaping of the
quantitazation noise. This is not a matter of the open loop gain being
a little bit low, there is something fundamentally wrong in what you
are doing. If you plot the spectrum on a log scale do you see a result
like the attached result?

                                                            Best Regards,

                                                                Sheldon
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sheldon
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Re: snr of adc calculation in cadence spectre
Reply #7 - Feb 24th, 2011, 4:28am
 
Kapile,

  If the sampling rate is 12,800Hz, then for 10 periods of settling the
initial time point is (10/12800) or 0.00078125s or 781.25us. The final
time would be 0.64078125 or 640.78125ms. You also need to be careful
that these time points do not occur at the clock edges when the data
transitions. The data needs to have a value of 0/1.

                                                                Best Regards,

                                                                    Sheldon
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