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Phase Noise of Δ-Σ modulators (Read 1344 times)
Mayank
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Posts: 320
Re: Phase Noise of Δ-Σ modulators
Reply #15 -
Jun 17
th
, 2010, 4:14am
Quote:
we have to set analysis time step lesser than time resolution of jitter.
What do you mean by resolution of Jitter ??
Quote:
This is not SDM for Fractional-N Synthesizer.
I can't find proper example of typical 3-cascaded-MASH-SDM for Fractional-N Synthesizer.
Posted by: Mayank
yeah, it's a band-Pass SDM, probably for some ADC application.
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pancho_hideboo
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Re: Phase Noise of Δ-Σ modulators
Reply #16 -
Jun 17
th
, 2010, 4:17am
Mayank wrote
on Jun 17
th
, 2010, 4:14am:
Quote:
we have to set analysis time step lesser than time resolution of jitter.
What do you mean by resolution of Jitter ??
If you use jitter generator model for fixed time step simulator, answer is self-evident.
If you use jitter generator for continous time simulator without sepecifying lowest time resolution, we can't know time resolution.
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Last Edit: Jun 17
th
, 2010, 5:31am by pancho_hideboo
»
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sheldon
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Re: Phase Noise of Δ-Σ modulators
Reply #17 -
Jun 17
th
, 2010, 5:21am
Mayank,
You might find this paper interesting, it deals with some of the issues
with writing PLL models for discrete time simulators.
http://www.cppsim.com/Publications/JNL/perrott_dtc02.pdf
You might also want to look at cppsim while it is not MATLAB, you find
it interesting. It is fast, has libraries to support PLL simulation, high
level tools for PLL design, and some useful tutorial examples.
Best Regards,
Sheldon
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Mayank
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Posts: 320
Re: Phase Noise of Δ-Σ modulators
Reply #18 -
Jun 17
th
, 2010, 5:50am
@ Pancho :
Quote:
If you use jitter generator model for fixed time step simulator, answer is self-evident.
If you use jitter generator for continous time simulator without sepecifying lowest time resolution, we can't know time resolution.
Now, i got what you meant by jitter resolution. Thanks.
Will get myself acquainted with the Schrier toolbox.
@ Sheldon :
Thanks for the link. I have worked on cppsim & sue models. The paper explains decently the PLL modelling. But cppsim is mainly for phase domain modelling of PLL. I was more interested in SDM Design. Thanks anyways.
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Ken Kundert
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The Spectre
Posts: 1442
San Jose
Re: Phase Noise of Δ-Σ modulators
Reply #19 -
Jun 17
th
, 2010, 4:59pm
Pancho,
Your comments about the simulator are only part of the issue. The Fourier transform itself samples the waveforms on a fixed interval. Assuming that the signal is a square wave, any jitter that occurs between the sample points is unobservable by the Fourier transform. Hence, Sheldon's original comment is correct.
-Ken
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pancho_hideboo
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Re: Phase Noise of Δ-Σ modulators
Reply #20 -
Jun 17
th
, 2010, 8:14pm
Ken Kundert wrote
on Jun 17
th
, 2010, 4:59pm:
The Fourier transform itself samples the waveforms on a fixed interval.
Right if we use conventional FFT.
Ken Kundert wrote
on Jun 17
th
, 2010, 4:59pm:
Assuming that the signal is a square wave, any jitter that occurs between the sample points is unobservable by the Fourier transform.
Hence, Sheldon's original comment is correct.
You are also wrong.
That is no more than an advertisement of Fourier Integral Calculation in Cadence Spectre.
If we use fixed time step solver in signal flow model simulator and set analysis time step lesser than time resolution of jitter,
we can never miss jitter in FFT.
http://www.designers-guide.org/Forum/YaBB.pl?num=1276575200/14#14
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Mayank
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Re: Phase Noise of Δ-Σ modulators
Reply #21 -
Jun 17
th
, 2010, 8:59pm
Quote:
If we use fixed time step solver in signal flow model simulator and set analysis time step lesser than time resolution of jitter,
we can never miss jitter in FFT.
Suppose, if the accuracy of discrete time simulator is 1ps,
& we upsample the waveform, be it square or sine, at less than 1ps,
then i dont think we are missing anything.
Since for taking FFT, we are sampling at rate higher than the accuracy of the simulator. I think that's what
Pancho
meant by
Quote:
we have to set analysis time step lesser than time resolution of jitter.
Then i agree with what
Pancho
said.
But, obviously this method requires unnecessary upsampling at such high frequency in the Post-Processing Phase generating large no. of timepoints.
If
Ken
says, Spectre employs a better algo taking only transition timepoints into consideration, then it's worth it.
Speaking alongwith the on-going but digressed discussion,
Ken
, if you say, taking a FFT directly over VCO/FDN to determine phase noise is incorrect, then while doing transient noise simulations on PLLs, when we take DFT of the output clock to obtain phase noise PSD, IS THAT INCORRECT TOO ??
--
Mayank.
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Ken Kundert
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The Spectre
Posts: 1442
San Jose
Re: Phase Noise of Δ-Σ modulators
Reply #22 -
Jun 18
th
, 2010, 9:07am
If you are using a fixed-time step simulator, you have already greatly limited your ability to represent jitter unless you convert the jitter to a real quantity that is passed on each transition. This is the idea behind Michael Perrott's CppSim and the matlab scrip I used in my PLL jitter paper.
Furthermore, if you are using a fixed-time step simulator there is no need to up-sample as no new information is gained. It is best to synchronize the sample rate of the Fourier Transform with the time step of the simulator.
-Ken
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Ken Kundert
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The Spectre
Posts: 1442
San Jose
Re: Phase Noise of Δ-Σ modulators
Reply #23 -
Jun 18
th
, 2010, 4:09pm
Mayank,
I never mentioned Spectre or its algorithms. Nor did I say that using a FFT to determine phase noise was incorrect. Rather I am just reiterating the point that Sheldon made, that FFTs sample the waveform and so have limited ability to resolve jitter. I believe Sheldon made an important point, and I believe that point was being lost.
-Ken
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sheldon
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Posts: 485
Re: Phase Noise of Δ-Σ modulators
Reply #24 -
Jun 18
th
, 2010, 5:43pm
Mayank,
Please see the following reference, the Fourier Integral is available
in MATLAB.
http://www.mathworks.se/access/helpdesk/help/toolbox/symbolic/fourier.html
Try it and see how if works your application.
Best Regards,
Sheldon
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Mayank
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Posts: 320
Re: Phase Noise of Δ-Σ modulators
Reply #25 -
Jun 24
th
, 2010, 10:23pm
Quote:
If you are using a fixed-time step simulator, you have already greatly limited your ability to represent jitter unless you convert the jitter to a real quantity that is passed on each transition. This is the idea behind Michael Perrott's CppSim and the matlab scrip I used in my PLL jitter paper.
Got your point.
Quote:
Furthermore, if you are using a fixed-time step simulator there is no need to up-sample as no new information is gained. It is best to synchronize the sample rate of the Fourier Transform with the time step of the simulator.
Right, but i do it just to increase the span of FFT for better viewing.
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pancho_hideboo
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Re: Phase Noise of Δ-Σ modulators
Reply #26 -
Jun 26
th
, 2010, 10:27pm
Consider actual instruments for evaluation of jitter characteristics.
They are based on fixed time step sampling even if edge trigger is used with not only Real-Time-Sampling but also Equivalent-Time-Sampling technique.
You know that they are very practical level, if you have experiences of actual measurements.
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hyy95
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Re: Phase Noise of Δ-Σ modulators
Reply #27 -
Jul 1
st
, 2010, 1:16am
In the realworld measurements, lots of averaging is done to bring down the noise floor.
In simulation, if the FFT points is not large enough or if you can't do tons of averaging, the quantize noise itself will kill the result.
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pancho_hideboo
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Re: Phase Noise of Δ-Σ modulators
Reply #28 -
Jul 1
st
, 2010, 4:21am
hyy95 wrote
on Jul 1
st
, 2010, 1:16am:
In the realworld measurements, lots of averaging is done to bring down the noise floor.
In simulation, if the FFT points is not large enough or if you can't do tons of averaging, the quantize noise itself will kill the result.
You are misunderstanding.
The main reason why many period sets are required is to capture many jitters and to increase frequency resolution for low frequency, since it is no more than monte carlo trials.
Of course, you can decrease floor level of noise, if you utilize frame averaging of spectrums for short time.
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