60nm is the minimum feature size of the lithography of the technology.

but i dont clearly understand your question. do you want to ask why Vth is so high? or do you want to know why there is a difference between vth0 and vth when there is no body bias (i suppose the vth and vth0 you r talking about are referred to the same length)??

aaron_do wrote on Apr 30^th, 2010, 2:10am:


hi,

threshold voltage depends on the doping process of the technology, so i dont believe "smaller vth at shorter length" is a general rule. in fact, none of the technologies i have used so far follows that.

and when you say vth is too high, you are comparing with which technologies? are those some 0.13um or 0.18um technologies from the same foundry? then it is quite reasonable because the gate oxide thickness has increased.

hi aaron,

aaron_do wrote on Apr 30^th, 2010, 8:27am:


i dont see any abnormality with the longer transistor having a reduced vth. as i said, that is actually what i have seen from all the technologies i have used.

i would expect in a short channel transistor, since the gate dimension is smaller, the interface cap is also smaller, so u need a higher voltgate to obatin suffienct charges under the gate to compensate the carriers in the substrate, so as to create the depletion layer.

but i have to say i am no physics guru, do you have some physics proof to show that this shouldn't be the case?

Quote:


isnt this what i said in my previous post? they increase the gate oxide thickness when they go from 180nm process to 65nm, maybe for the sake of leakage prevention and so on.

in general i dont think the vth is very high. it is really the case that the vsupply/vth ratio drops drastically when the technology geometry gets slimmer, and the headroom thus becomes one of the biggest obstacles in the design, for example i think u can hardly find a cascode amp in these technologies. (the other critical issue would be the low gm*gds value so you need more gain stages). please notice these technologies are optimized only for digital circuits and they are actually very unfriendly to analog design.

This is called reverse short channel effect. Google it and you will get some ideas.

Threshold voltage is a complex function of doping density under the channel, gate oxide thickness and a bunch of other things.

Channel doping and oxide thickness are the two primary things.

You can adjust those things and get any threshold you want (within reason of course, but parasitic junctions and second  order effects are a different issue)

Threshold is typically set by foundry parameters (see above) to be between 20% and 40% of the power supply voltage that is used on the logic power supply.

Note: Logic Power Supply

The reason for this is to allow digital CMOS to function, with some immunity to ground bounce and power rail variance across a chip.

Now, from there the Logic power supply is limited by things like Vgs limitations (fried gate oxide issues)

What foundry model set is this? There's a lot of bad models out there.

aaron_do wrote on May 2^nd, 2010, 7:16pm:


IBM model sets are usually pretty good. Probably one of the community processes. 14SF or something similar would be my guess. (The XXSF series is their generic logic CMOS)

longer L has smaller since the I-V curve gradient is reduced. It is true for all processes. You could refer to those basic CMOS VLSI books.