Thanks for the help,
Quote:That means 2 peak detectors - one on the filter out and one on the reference amplitude. The reference amplitude is the same signal that goes into the filter, but its resistively divided down. That way you are comparing a resistor divider and a filter rolloff. Everything else is matched and the same.
this is the exact method i'm trying to use. However, i'm trying to figure out how fast I can clock the loop, and also how much attenuation of the 2nd harmonic I need at the output of the peak detectors for the comparator. For simplicity, i'm not using any optimized search algorithm, i'm simply using an up/down counter to find the correct frequency. Here's what I've figured:
I want the filter to settle to within about 5% of the desired 3dB frequency. Therefore for a good comparison I need to attenuate the second harmonic by at least 95%. So if 2f is 2 MHz, then LPF corner frequency should be no more than 100 kHz. In order for the filter to settle to within 5% of the final value, the clk period can be no more than t=-ln(0.05)/(2*pi*100kHz)≈1/200kHz.
Does this sound right?
thanks,
Aaron
EDIT:
seems I will need to think more on this. The signal filter has about 0.35uV/Hz frequency gradient at 1MHz and 1V input. So for 50 kHz resolution, 2nd harmonic must be attenuated by 50k*0.35u = 0.0175. i.e for 1st order LPF after peak detection, I need f3dB=0.0175*2MHz = 35 kHz, and maximum clock rate = 70 kHz. Probably need to go with even smaller values for assurance...
-Actually that only works if the change in voltage versus 3dB frequency of my filter is large signal linear. I think simulations are in order...