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Peak detector pole frequency for Filter Tuning Loop (Read 1938 times)
aaron_do
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Peak detector pole frequency for Filter Tuning Loop
Nov 05th, 2009, 9:38pm
 
Hi all,


I'm designing a filter tuning loop based injecting a signal at the 3 dB frequency and matching the signal amplitude to a reference level. The pole frequency is determined by a digitally variable capacitor array and the digital section is clocked at 100 kHz.

For the peak detector, the pole frequency needs to be low enough to reject the 2f0. However, IMO it also needs to be high enough to respond to the change in signal amplitude before the next clock cycle. Is this correct? So if 2f0 is 2 MHz, then I probably need to set the pole frequency around 200 kHz. Does this sound right? Well I simulated the circuit in closed loop and found it worked better with a pole frequency much lower than 100 kHz. How was it able to respond?

Second question: in order to filter out 2f0 more effectively, I thought I could use an twin-T RC-notch filter. Does this sound like a good idea? It worked when I simulated the peak detector alone, but the transient analysis had a lot of trouble starting when I ran it with the whole loop. Any comments on this?


thanks,
Aaron
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loose-electron
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Re: Peak detector pole frequency for Filter Tuning Loop
Reply #1 - Nov 6th, 2009, 10:46am
 
Aaron -
I use this technique, but I match paths when doing it.

That means 2 peak detectors - one on the filter out and one on the reference amplitude. The reference amplitude is the same signal that goes into the filter, but its resistively divided down. That way you are comparing a resistor divider and a filter rolloff. Everything else is matched and the same.

As for a notch filter? Why bother? If its periodic at the fundamental frequency used (set at the roll off point you are calibrating) all the harmonics are up above (in theory anyhow) so  a LPF should work just fine.

As for bandwidths of everything - you need some time for the 2 peak detectors and their LPF output averaging circuits (I compare 2 DC voltages when making tuning decisions) to settle out. Consequently multiple clock cycles to let the system settle and average for each tuning step are usually needed.  

Also, I close the loop on this thing digitally. My philosophy here is that a digital control feedback system that moves in steps gives you a lot more freedom than closing some analog control loop. Smaller in size, ability to portt hte controls out and experiment with settings. On the analog side, I provide a digital control to step the filter response and a comparison of output ampliudes from the two peak detectors.

Everything else is digitally controlled. Smaller than a control integrator, and complete freedom to change the algorithm used under soft-firmware control.
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aaron_do
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Re: Peak detector pole frequency for Filter Tuning Loop
Reply #2 - Nov 8th, 2009, 1:46am
 
Thanks for the help,


Quote:
That means 2 peak detectors - one on the filter out and one on the reference amplitude. The reference amplitude is the same signal that goes into the filter, but its resistively divided down. That way you are comparing a resistor divider and a filter rolloff. Everything else is matched and the same.


this is the exact method i'm trying to use. However, i'm trying to figure out how fast I can clock the loop, and also how much attenuation of the 2nd harmonic I need at the output of the peak detectors for the comparator. For simplicity, i'm not using any optimized search algorithm, i'm simply using an up/down counter to find the correct frequency. Here's what I've figured:

I want the filter to settle to within about 5% of the desired 3dB frequency. Therefore for a good comparison I need to attenuate the second harmonic by at least 95%. So if 2f is 2 MHz, then LPF corner frequency should be no more than 100 kHz. In order for the filter to settle to within 5% of the final value, the clk period can be no more than t=-ln(0.05)/(2*pi*100kHz)≈1/200kHz.

Does this sound right?

thanks,
Aaron

EDIT:

seems I will need to think more on this. The signal filter has about 0.35uV/Hz frequency gradient at 1MHz and 1V input. So for 50 kHz resolution, 2nd harmonic must be attenuated by 50k*0.35u = 0.0175. i.e for 1st order LPF after peak detection, I need f3dB=0.0175*2MHz = 35 kHz, and maximum clock rate = 70 kHz. Probably need to go with even smaller values for assurance...


-Actually that only works if the change in voltage versus 3dB frequency of my filter is large signal linear. I think simulations are in order...
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loose-electron
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Re: Peak detector pole frequency for Filter Tuning Loop
Reply #3 - Nov 9th, 2009, 5:19pm
 
Well I am not sitting here doing the math, but I you seem to understand the items that need to be adjusted against each other. Its a math modelling exercise of settling time and bandwidths, so its probably time to at least run a behavioral model on all of it.

Successive approximation will speed up tuning quite a bit, so yo may want to include that in your tune algorithm.

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aaron_do
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Re: Peak detector pole frequency for Filter Tuning Loop
Reply #4 - Nov 10th, 2009, 6:48am
 
Thanks for the help.

I got the hint about successive approximation from your first post when you mentioned soft-firmware control, but since this is my first attempt I guess i'll keep the design simple.

cheers,
Aaron
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loose-electron
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Re: Peak detector pole frequency for Filter Tuning Loop
Reply #5 - Nov 10th, 2009, 5:55pm
 
got to lose your innocence eventuaqlly. I could make all kinds of analogies thgat are not politically correct, but that is left as an exercise for the reader.

Cheesy
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