Designer’s Guide Community

vivkr

Community Fellow

Offline

Posts: 780

stability simulation of differential circuit (pstb
Sep 25^th, 2007, 1:09am

Hi,

I am trying to do a stability analysis of my circuit. I don't want to break the loop.
I have the following questions:

1. Since the circuit is differential, I would need to use differential probing elements,
wouldn't I? How would one do this?

2. I have 2 forward signal paths in my amplifier (gain-boosting). Will this cause
a problem for stability analysis using double-injection methods? I plan to insert
a probe at a point where there is only 1 signal propagation path, once I have figured
out how to insert a probe for differential measurement without changing the loading.

Your comments are most welcome.

Thanks
Vivek

Back to top

IP Logged

Frank Wiedmann

Community Fellow

Offline

Posts: 677
Munich, Germany

Re: stability simulation of differential circuit (
Reply #1 - Sep 25^th, 2007, 2:05am

For a differential circuit, you can use the cmdmprobe from analogLib. Type "spectre -h stb" for a short description showing how to use it (in the cmdmprobe schematic, the CMDM parameter takes the place of the alter statement from "spectre -h stb"). Alternatively, you can connect two ideal baluns back-to-back (use the ideal_balun component from analogLib, this component is described in http://www.designers-guide.org/Analysis/diff.pdf) and put the stb probe in the differential-mode path and possibly also in the common-mode path between them (if there is some common-mode regulation).

If there are multiple loops in your circuit, the stb analysis is only valid if you put the probe in a path that breaks all loops. Please see http://www.kenkundert.com/docs/cd2001-01.pdf for details, this article describes how the stb analysis works.

Finally, you have to distinguish between stb analysis and pstb analysis. The stb analysis is based on the ac analysis, the pstb analysis is based on the pac analysis and can be used for example for switched-capacitor circuits.

Back to top

IP Logged

vivkr Community Fellow Offline Posts: 780	Re: stability simulation of differential circuit ( Reply #2 - Sep 25^th, 2007, 2:28am Ah cool! All I have to do is enter -1 for DM and +1 for CM. That's quite a cool block to have. Thanks a lot Frank !!! Vivek
Back to top	IP Logged

hiSkill_11

Community Member

Offline

Posts: 35

Re: stability simulation of differential circuit (
Reply #3 - Jun 13^th, 2012, 12:00am

Hi, Frank

Question.

When the iprobe is inserted into the frequency dependent path, does it function effectively? For example, op-amp and capacitor based inverting gain(-1) stage in which the feedback is capacitive.

In addition, when i simulate the loop gain of the cystal oscillator which has three loops, one is the oscillation loop(including all), and the sencond is self biasing loop (including gain element and feedback resistor serialized between the input and output of the gain element), and the third is the oscillation amplitude controlling loop. I can't find a point where I can break all loops simultaneously. Which is the correct way to simulate the gain margin with stb for the crystal oscillator? And how can i simulate the oscillation amplitue control loop? I have to use pstb, right?

Frank Wiedmann wrote on Sep 25^th, 2007, 2:05am:

For a differential circuit, you can use the cmdmprobe from analogLib. Type "spectre -h stb" for a short description showing how to use it (in the cmdmprobe schematic, the CMDM parameter takes the place of the alter statement from "spectre -h stb"). Alternatively, you can connect two ideal baluns back-to-back (use the ideal_balun component from analogLib, this component is described in http://www.designers-guide.org/Analysis/diff.pdf) and put the stb probe in the differential-mode path and possibly also in the common-mode path between them (if there is some common-mode regulation).

If there are multiple loops in your circuit, the stb analysis is only valid if you put the probe in a path that breaks all loops. Please see http://www.kenkundert.com/docs/cd2001-01.pdf for details, this article describes how the stb analysis works.

Finally, you have to distinguish between stb analysis and pstb analysis. The stb analysis is based on the ac analysis, the pstb analysis is based on the pac analysis and can be used for example for switched-capacitor circuits.

Back to top

IP Logged

Frank Wiedmann

Community Fellow

Offline

Posts: 677
Munich, Germany

Re: stability simulation of differential circuit
Reply #4 - Jun 13^th, 2012, 2:13am

hiSkill_11 wrote on Jun 13^th, 2012, 12:00am:

Hi, Frank

Question.

When the iprobe is inserted into the frequency dependent path, does it function effectively? For example, op-amp and capacitor based inverting gain(-1) stage in which the feedback is capacitive.

I don't see why there should be any problem with capacitive feedback.

Quote:

In addition, when i simulate the loop gain of the cystal oscillator which has three loops, one is the oscillation loop(including all), and the sencond is self biasing loop (including gain element and feedback resistor serialized between the input and output of the gain element), and the third is the oscillation amplitude controlling loop. I can't find a point where I can break all loops simultaneously. Which is the correct way to simulate the gain margin with stb for the crystal oscillator? And how can i simulate the oscillation amplitue control loop? I have to use pstb, right?

I'm not sure how much sense it makes to simulate the (in)stability of the oscillation loop (provided that the simulator finds a "dc operating point" at all). You can probably simulate the stability of a biasing loop or amplitude control loop with a pstb analysis. You have to insert the probe at a point where you have a continuous, non-oscillating signal. If the loops don't interact, you should be able to simulate them separately. Depending on your circuit, you might get similar results for the biasing loop with a faster stb analysis at the (artificial) "dc operating point". If you have more detailed questions, please post a schematic of your circuit.

By the way, the cmdmprobe for differential signals is now obsolete. It is recommended to use the diffstbprobe instead. You can find some more details on my webpage http://sites.google.com/site/frankwiedmann/loopgain.

Back to top

IP Logged

Vladislav D Community Member Offline Posts: 76 The Netherlands	Re: stability simulation of differential circuit (pstb Reply #5 - Jun 13^th, 2012, 6:39am The best way to simulate stability is to use a time domain simulation. Say supply voltage step or to insert a voltage/current source with a small step input. Then, based on a response you can estimate a natural frequency omega, damping factor and a phase margin, consequently.
Back to top	IP Logged

buddypoor

Community Fellow

Offline

Posts: 529
Bremen, Germany

Re: stability simulation of differential circuit (
Reply #6 - Jun 14^th, 2012, 9:45am

hiSkill_11 wrote on Jun 13^th, 2012, 12:00am:

In addition, when i simulate the loop gain of the cystal oscillator which has three loops, one is the oscillation loop(including all), and the sencond is self biasing loop (including gain element and feedback resistor serialized between the input and output of the gain element), and the third is the oscillation amplitude controlling loop. I can't find a point where I can break all loops simultaneously. Which is the correct way to simulate the gain margin with stb for the crystal oscillator? And how can i simulate the oscillation amplitue control loop? I have to use pstb, right?

What is the purpose of simulating the loop gain in your case?
I think, the only purpose is to check if the oscillation condition is met (or not met).
In this case, of course the main (overall) loop has to be considered only.
More than that, the amplitude stabilizing loop is non-linear and must not be effective for ac simulations.

Comment to Vladislav: I wonder how it should be possible to determine the phase margin (frequency domain) through simulations in the time domain.

Back to top

LvW (buddypoor: In memory of the great late Buddy Rich)

IP Logged