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vx1120

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Help Understanding XF
Feb 01^st, 2006, 1:22pm

HI all,

In my search for determining open loop stability of a fully differential OTA, I came across a presentation by Jonathan David.

http://engr.smu.edu/orgs/ssc/slides/20001215b.pdf

I thought it was very interesting, and manually implemented the test bench in AE with Spectre. The ac analysis seems to have gone without a hitch, but for the xf analysis, I am confused.

My xf plot, per the presentation and ocean script that he has kindly included is dB20((1 / getData("VCM" ?result "xf-xf"))), produces a plot that is similiar to the one on the lower left hand corner of slide 9.

I can not figure out how he ended up with Rejection Ratio plots of Slide 18? Any suggestions as to where to look?

Thanks in advance.

Best Regards,

Sam

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sheldon Community Fellow Offline Posts: 751	Re: Help Understanding XF Reply #1 - Feb 1^st, 2006, 9:44pm Sam, You probably need to ask Jonathan, you can send him a message. From the annotations, it appears that he is manually adding device mismatch by modiifying the gate width and length of key transistors. Best Regards, Sheldon
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vx1120

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Re: Help Understanding XF
Reply #2 - Feb 2^nd, 2006, 7:02am

Hi Sheldon,

Thanks for spending your valuable time and extending a helping hand!

I have tried to contact Jonathan, twice from different email accounts one from a public (yahoo, hotmail, etc) and one private account. Seems the cadence server refused to deliver the email or he is no longer at Cadence.

Incidentally, I did find a white paper in the Cadence website on this topic. And since no author is given but the test bend is the same as is the format of the ocean script, I must conclude it was also from Jonathan. Unfortunately, although it included more ocean script code, it added little to my understanding of my issue.

For those interested,

http://www.cadence.com/whitepapers/FVofDiffOpAmp_wp.pdf

I did notice the sub title on Slide 18, and thought that was the issue. However, rehashing the ocean script in my head, running the ocean script, and reading the white paper seems to have confused me more. At the end of the presentation, he attaches the actual plot generated by the ocean script and it appears that he did not modify the gate width, and yet the plot still appears identical to slide 18.

Rgds,

Sam

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Andrew Beckett Senior Fellow Offline Life, don't talk to me about Life... Posts: 1742 Bracknell, UK	Re: Help Understanding XF Reply #3 - Feb 2^nd, 2006, 8:04am Jonathan contributes to this forum - http://www.designers-guide.org/Forum/YaBB.pl?action=viewprofile;username=jbdavid... He's no longer at Cadence, but I'm sure he'd still answer (he has contributed quite a few times over the last few months). Regards, Andrew.
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vx1120

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Re: Help Understanding XF
Reply #4 - Feb 2^nd, 2006, 8:45am

Andrew,

Thank you!! For your information, I have personally learned so much from your posts both here and the Cadence News Group, that I owe you a great deal of gratitude.

I was not aware that Jonathan was on this forum using the same username. I also noticed that I got a message from Marc stating the same. I am relatively new to this forum and still exploring its' features.

I have sent Jonathan a PM and will wait, as patiently as I can for a response.

Regards,

Sam

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jbdavid

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Re: Help Understanding XF
Reply #5 - Feb 3^rd, 2006, 12:08am

Hi Sam..
That paper went thru a couple of iterations - from the time a customer said: " But you're from Cadence,
Why don't you tell me how we should simulate the Opamp?" (research and experimentation lag) and the answer for him, to a presentation for a couple of IEEE-SSC chapters on how to do it ( Maybe the slide set you have? ) to the International Cadence User Group (ICU) presentation in 2000/2001? where I focused on how to automate that presentation..
Back in those days I assumed I'd be at Cadence for the rest of my Career.. and that I'd have time to update and enhance those presentations into a complete methodology..
Oh well.
so you REALLY need the full set, and while I have the Pdf and can send it to Ken, he might have to get permission from Cadence to post it here.. (but it USED to be on the IEEE SCV SSC website.. and it was a public presentation? but the Copywrite owner is STILL probably Cadence..

In any case I don't have it on any disk with me at the moment..
So I'll have to do this from memory.. �

or from Page 6 of the paper on the Cadence website.. the key is this sentence..
The XF analysis is perfectly suited for measurement of the Rejection Ratios[18]. By setting the DUT input nodes
(Where the Voltage represents the Offset) as the XF �output� nodes the gain from each source represents the change
in the input voltage due to a change in that supply, or δVin/δVsupply. The Common Mode Rejection Ratio is
classically defined as Vd/Vc or ( maybe it should be Ad/Ac for Diff Gain/Common Mode Gain )
(if you remember Dr. Amort pounded this into our heads in the Junior Year Circuits Class.. (at least those of us at Oregon State back in the 80's.. he was also the IEEE Student Branch Advisor while I was there, and HKN Faculty.. �-round of Applause for Great Engineering Profs!!)

δVout/δVin
δVout/δVcm

which reduces to

dVcm/dVin,

the inverse of the XF
result from the Common Mode Source. Similar results apply to the other Rejection Ratios..

Hope this helps.

Jonathan

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jbdavid
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jbdavid

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Re: Help Understanding XF
Reply #6 - Feb 3^rd, 2006, 12:15am

Oh man.. after posting this, I re-read your question, and got my slides from the SMU site.. and
YES.. the Key is the 5% dw dl.. (+w -l? +l -w ???)
What I did was pick one device in the dif pair, and adjusted the width and length by 5%
and ran the simulation.. back in the 4.4.3-4.4.5 days when I wrote this you could make a change to the schematic and re-run the sim without saving and re-extracting ..
So there is no schematic plot of this, nor do I have that database anymore..
(though I did give it without the PDK to a couple of folks.. ?)
Alternatively you could run MC analysis of the XF result and get a family of plots, only one of which might look like the one on page 9..

Jonathan

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jbdavid
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jbdavid

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Re: Help Understanding XF
Reply #7 - Feb 3^rd, 2006, 12:43am

In the copy of MY paper on the Cadence website (They own so it they can take my name off of it.. )
the KEY to answer Sam's question is the following two lines in the ocean script..
this is the key variable change..
on transistor B I set w = wndiff l=lndiff
and on A I set w= wndiffa l=lndiffa
so

desVar( "wndiffa" "wndiff+30n" )
desVar( "lndiffa" "lndiff+1n" )

creates a size mismatch, and thus the difference XF result shown.
Jonathan

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jbdavid
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vx1120 New Member Offline Posts: 6	Re: Help Understanding XF Reply #8 - Feb 3^rd, 2006, 7:27am Jonathan, Thank you SO MUCH for clearing up my confusion. It is a very nice piece of work! Best Regards, Sam
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vx1120

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Re: Help Understanding XF
Reply #9 - Feb 14^th, 2006, 12:14pm

Jonathan,

Have you noticed convergence issues with the TB when the transient step analysis is performed? �I am having an odd convergence issue with such an analysis. �Spentre would fail to converge on the first run, but if I just netlist and run, without changing anything a second time, it converges and finishes the simulation. � This occurance is consistant and repeatable, that is, if I change a variable or simulation paramter it would fail the initial netlist and run then a subsequent netlist and run would succeed. �I have come to the conclusion that it is the VerilogA block. �

Any suggestions? �

The applied sine signal to determine THD works every time. �

Regards,
Sam

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jbdavid Community Fellow Offline Posts: 378 Silicon Valley	Re: Help Understanding XF Reply #10 - Mar 10^th, 2006, 8:32pm I haven't re-used this in a while.. It sounds like a software issue I used to use a parameter to fix though.. jonathan
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vx1120 New Member Offline Posts: 6	Re: Help Understanding XF Reply #11 - Mar 20^th, 2006, 6:23am Thanks Jonathan. I will see if I can fix the issue. Regards, sam
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jbdavid Community Fellow Offline Posts: 378 Silicon Valley	Re: Help Understanding XF Reply #12 - Aug 11^th, 2006, 2:50am As an update - I recall seeing a solution on sourcelink.cadence.com for this there is a variable you can set in your .cdsenv file that takes care of it.. to late tonight to go find it.. but I think its been mentioned in these forums someplace as well..
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arupkg New Member Offline Posts: 9 Singapore	Re: Help Understanding XF Reply #13 - Sep 26^th, 2013, 12:44am Hi David/Sam, How did you guys setup the voltage sources for transient simulation? VTRAN as well as V0. It would be great if you could explain a bit about VTRAN as well as V0, in this test bench. It is not clear from the document, if the parameters pw as well as per apply for both the sources? Many thanks
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