Forum Forum Verilog-AMS Analysis Modeling Design Theory Books Welcome, Guest. Please Login or Register. Please follow the Forum guidelines. Jul 22nd, 2017, 9:49am     HomeHelpSearchLoginRegisterPM to admin     The Designer's Guide Community Forum › Design › Analog Design Pages: 1 2 3 ... 130   Subject Started by Replies Views Last post settling time of charge pump in a CPPLL. Jacki 7 105 Jul 18th, 2017, 11:42pm By: Jacki Problems when increasing the frequency in ring oscillator Abdallah Kamal 1 86 Jul 18th, 2017, 1:25am By: Jacki Switched-capacitor Bandgap Reference-Switch Sizing prietess 4 206 Jul 10th, 2017, 9:55am By: prietess Troubles about Project Based on LM5008MM lingling 0 67 Jul 3rd, 2017, 1:04am By: lingling Deriving Gm of circuit blue111 4 1004 Jun 24th, 2017, 6:31am By: blue111 Terminal Impedance Modification using Feedback blue111 0 61 Jun 23rd, 2017, 2:47am By: blue111 Self-Biasing Supply Independent Reference olrac_s 0 172 Jun 17th, 2017, 5:13am By: olrac_s CMRR effects of error amp in LDO leejooseong222 2 158 Jun 11th, 2017, 4:20am By: leejooseong222 Moved: passive sigma delta adc analysis - Started by: skamlesh This Topic has been moved to Circuit Simulators by Ken Kundert How to reduce the overshoot due to a RCL step response? Jacki 5 278 Jun 2nd, 2017, 2:40am By: Jacki Why should CP - PLL have limited bandwidth? subtr 3 420 May 30th, 2017, 1:38pm By: BillH Moved: Monte-Carlo Simulations in UMC180...? - Started by: Ramakrishna RSSM This Topic has been moved to Circuit Simulators by Ken Kundert Common Source Amplifier with Current Mirror Load Design using gm/Id method « Pages 1 2 » Bean Nakamura 19 1251 May 18th, 2017, 10:11pm By: Bean Nakamura SC-CMFB operating frequency designerH 1 141 May 18th, 2017, 8:11pm By: Roy body effect abhilash_172 3 273 May 17th, 2017, 5:47am By: AnilReddy type of feedback in the 2nd stage of a 2 stage OTA tenso 0 167 May 4th, 2017, 10:48pm By: tenso PMOS current source I-V characteristics Harian 3 243 May 2nd, 2017, 1:53pm By: Harian how to calculate the offset voltage of fully diff amp manish123456 1 185 May 1st, 2017, 11:34am By: ULPAnalog ADC layout skyer 1 247 Apr 25th, 2017, 7:18pm By: DanielLam SC-CMFB for MDAC designerH 0 153 Apr 22nd, 2017, 2:39pm By: designerH Pages: 1 2 3 ... 130 Normal Topic Sticky Topic Locked Topic Sticky Locked Topic Moved Topic Global Announcement Hot Topic (More than 10 Replies) Very Hot Topic (More than 25 Replies) You can view Topics in this Board. You cannot post replies to Topics in this Board. You cannot start new Topics in this Board. You cannot start Polls in this Board. Forum Jump » » 10 most recent Posts » 10 most recent Topics Design  - RF Design »» Analog Design   - Mixed-Signal Design   - High-Speed I/O Design   - High-Power Design   - Mixed-Technology Design Analog Verification  - Analog Functional Verification   - Analog Performance Verification Measurements  - RF Measurements   - Phase Noise and Jitter Measurements   - Other Measurements Modeling  - Semiconductor Devices   - Passive Devices   - Behavioral Models   - Transmission Lines and Other Distributed Devices Design Languages  - Verilog-AMS   - VHDL-AMS Simulators  - Circuit Simulators   - RF Simulators   - AMS Simulators   - Timing Simulators   - System Simulators   - Logic Simulators Other CAD Tools  - Entry Tools   - Physical Verification, Extraction and Analysis   - Unmet Needs in Analog CAD General  - Tech Talk   - News   - Comments and Suggestions   - Opportunities   ‹ Home The Designer's Guide Community Forum » Powered by YaBB 2.2.2! YaBB © 2000-2008. All Rights Reserved. Opportunities What's New Links Experts Perspective Submissions Calculator Trouble viewing this site? Copyright © 2002-2014 Designer's Guide Consulting. 'Designer's Guide' is a registered trademark of Designer's Guide LLC. All rights reserved. Community Web Advertise on this site.

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