Forum Forum Verilog-AMS Analysis Modeling Design Theory Books Welcome, Guest. Please Login or Register. Please follow the Forum guidelines. Apr 20th, 2018, 1:34am     HomeHelpSearchLoginRegisterPM to admin     The Designer's Guide Community Forum › Design › Analog Design Pages: 1 2 3 ... 133   Subject Started by Replies Views Last post How to compensate the parasitic cap of the top plate of DAC in SARADC Jacki 2 154 Apr 17th, 2018, 2:44pm By: DanielLam Fully Differential Amplifier MISMATCH analysis Ankit 0 50 Apr 17th, 2018, 2:56am By: Ankit Question about gyrator implementation of active inductor blue111 11 382 Apr 16th, 2018, 5:07am By: danmc glitches of switched-capacitor circuits chandlerbing65nm 1 72 Apr 16th, 2018, 2:13am By: Jacki How to measure the Q factor of a low pass filter in Cadence? josvlsi 4 142 Apr 11th, 2018, 12:04am By: josvlsi LDMOS voltage tolerance neoflash 1 74 Apr 10th, 2018, 11:35pm By: Jacki ESD tutorial basic (HBM, power clamp) liletian 1 81 Apr 10th, 2018, 11:32pm By: Jacki Why dose SDM ADC has larger energy of IM5 and IM7 abbotvan 1 103 Apr 2nd, 2018, 10:48pm By: abbotvan How to measure temperature coefficient (TC) in bandgap reference circuit? Bean Nakamura 0 86 Mar 27th, 2018, 9:56pm By: Bean Nakamura VDSAT more than VGS-VTh cmosa 0 91 Mar 27th, 2018, 1:55pm By: cmosa Moved: Measuring transfer characteristics of fully differential OTA - Started by: indra0804 This Topic has been moved to Other Measurements by Ken Kundert how to understand pole at RHP Jacki 9 564 Mar 20th, 2018, 11:54pm By: subtr BJT circuit:  Resistor to Voltage Converter luoshuer 3 244 Mar 20th, 2018, 1:39am By: Jacki Moved: AC simulation convergence issue - Started by: mixed_signal This Topic has been moved to Circuit Simulators by Ken Kundert PLL design in virtuoso pashtp 4 326 Mar 15th, 2018, 10:32am By: pashtp Official abbreviation for "mega samples per second"? spectrallypure 1 146 Mar 14th, 2018, 3:20am By: spectrallypure Differential current input amplifier ttwwjj 1 188 Mar 14th, 2018, 12:52am By: Jacki Help needed for sensitivity function analysis. tenso 3 276 Mar 1st, 2018, 11:12pm By: Maks Correlated Double Sampling(CDS) efficiency kabir_fakir 7 605 Feb 27th, 2018, 12:57am By: kabir_fakir Nested Miller Compensation blue111 0 204 Feb 25th, 2018, 6:08am By: blue111 Pages: 1 2 3 ... 133 Normal Topic Sticky Topic Locked Topic Sticky Locked Topic Moved Topic Global Announcement Hot Topic (More than 10 Replies) Very Hot Topic (More than 25 Replies) You can view Topics in this Board. You cannot post replies to Topics in this Board. You cannot start new Topics in this Board. You cannot start Polls in this Board. Forum Jump » » 10 most recent Posts » 10 most recent Topics Design  - RF Design »» Analog Design   - Mixed-Signal Design   - High-Speed I/O Design   - High-Power Design   - Mixed-Technology Design Analog Verification  - Analog Functional Verification   - Analog Performance Verification Measurements  - RF Measurements   - Phase Noise and Jitter Measurements   - Other Measurements Modeling  - Semiconductor Devices   - Passive Devices   - Behavioral Models   - Transmission Lines and Other Distributed Devices Design Languages  - Verilog-AMS   - VHDL-AMS Simulators  - Circuit Simulators   - RF Simulators   - AMS Simulators   - Timing Simulators   - System Simulators   - Logic Simulators Other CAD Tools  - Entry Tools   - Physical Verification, Extraction and Analysis   - Unmet Needs in Analog CAD General  - Tech Talk   - News   - Comments and Suggestions   - Opportunities   ‹ Home The Designer's Guide Community Forum » Powered by YaBB 2.2.2! YaBB © 2000-2008. All Rights Reserved. Opportunities What's New Links Experts Perspective Submissions Calculator Trouble viewing this site? Copyright © 2002-2014 Designer's Guide Consulting. 'Designer's Guide' is a registered trademark of Designer's Guide LLC. All rights reserved. Community Web Advertise on this site.

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