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1  Modeling / Semiconductor Devices / Re: For MOS Cap, is the a depletion region in MOS when VFB < VGB < 0?
 on: Yesterday at 1:58pm 
Started by mpig09 | Post by Maks
There is always depletion region when Vg > VFB.
At Vg> Vt though, the depletion regions is "screened" (or shielded) by the inversion layer (a thin layer of electrons in the channel, at the Si/oxide interface, supplied from N+ source/drain regions).

If you want to understand what all these terms mean - depletion, deep depletion, accumulation, inversion - you can read any textbook on semiconductor device physics (for example, S.Sze book "Physics of semiconductor devices").

Max

2  Modeling / Semiconductor Devices / For MOS Cap, is the a depletion region in MOS when VFB < VGB < 0?
 on: May 25th, 2017, 5:47pm 
Started by mpig09 | Post by mpig09
Hi all:

Many books explain the MOS Cap value is Cox(oxide cap) serial Cdep(depletion cap) when VFB < VGB < VTH,
I have a questions: is there a depletion region in MOS when VFB < VGB < 0?

VFB : Flat band voltage

If Yes, could you help me to understand it.

Thank.

mpig

3  Simulators / Circuit Simulators / Re: pss and pac analysis for chopper stabilized op-amp
 on: May 25th, 2017, 2:00am 
Started by rames | Post by Ken Kundert
Your set up looks okay to me. By simply specifying you encountered a Nil-Nil error, you have robbed the message of all its context. It would be good to show it so we can determine ...

1. What is printing the message? Is it ADE, Spectre, or something else.
2. If it is Spectre printing the message, is it PSS, PAC or something else?

Printing Nil-Nil to identify an error makes it sounds like an internal error produced by ADE, which suggests that maybe you did not set something you should have. You might want look around. If you cannot find anything, you might want to talk to Cadence. Unless this is known problem with a known workaround, it is hard for other users to help you with an internal error.

-Ken

4  Simulators / Circuit Simulators / Re: Negative valued inductors and capacitors in SPICE
 on: May 25th, 2017, 1:52am 
Started by mhx | Post by mhx
Putting a few things together, I have an hypothesis of what is the problem. Some SPICEs have the option of automatically putting resistors in series or in parallel with inductors to help convergence. This reasonable looking hack will not work when the inductance is negative -- in that case the resistance(s) should be negative also.

I tested this hypothesis with the troublesome SPICE and indeed, when I turn off the GUI option to damp inductors and add negative resistors by hand instead, the simulation converges fine.

The same type of effect is expected for negative capacitors.

-marcel


5  Simulators / Circuit Simulators / pss and pac analysis for chopper stabilized op-amp
 on: May 25th, 2017, 12:04am 
Started by rames | Post by rames
Hello,
I am trying to simulate a chopper stabilized op-amp (Single output: Vout and differential input: Vi1, Vi2) in Cadence Virtuoso (PSS + PAC analyses), and seeing the output node and frequency response in rage of 1 Hz to 1K Hz.
I set the analysis parameters as shown in figures and start the simulation.  After that it reported "Nil-Nil" error. I try these equations in setting outputs to plot output node and frequency response:

output node => ( (v ("/Vout")) : pss) (V)
frequency response => dB20( harmonic( v("/Vout" ?result "pac") 0) / (harmonic(v("/Vin1" ?result "pac") 0) - harmonic(v("/Vin2" ?result "pac") 0)))

But i think somewhere i made a mistake. Could you please help me?
Thanks in advence

6  Simulators / Circuit Simulators / Re: Negative valued inductors and capacitors in SPICE
 on: May 24th, 2017, 11:45pm 
Started by mhx | Post by Ken Kundert
Those restrictions are not in Spectre. Resistors, capacitors, and inductors can all be positive, negative, or zero. In addition, resistors can be infinite (just don't give a resistance, it defaults to ∞. I don't remember what if any restrictions were placed on the mutual inductor coupling factors. Perhaps they must fall in the range -1 < k < 1. But it would make no sense to restrict k to being positive.

I have not seen the paper you references, so I cannot comment on it.

-Ken

7  Simulators / Circuit Simulators / Re: Negative valued inductors and capacitors in SPICE
 on: May 24th, 2017, 10:54pm 
Started by mhx | Post by mhx
Given the Kumar paper I assumed there was an algorithmic reason that no negative element values were allowed. Your answer prompted me to find ERL-M520, Larry Nagel's SPICE2 description. It specifies that resistors can be negative, capacitors can not be negative, and inductors can not be 0. The coefficient of coupling can be negative.

I agree negative valued components are not physical, but (as in Kumar's paper) they are sometimes convenient when working with equivalent circuits of transformers (e.g. the T-model when the turns ratio is not 1), or for HF circuitry.

-marcel



8  Simulators / Circuit Simulators / Re: Negative valued inductors and capacitors in SPICE
 on: May 24th, 2017, 1:14pm 
Started by mhx | Post by Ken Kundert
It was just a choice made by Larry. Negative resistors, capacitors and inductor cause problem and never come up in real circuits, so he chose to make specifying them an error.

-Ken

9  Simulators / Circuit Simulators / Negative valued inductors and capacitors in SPICE
 on: May 24th, 2017, 12:30pm 
Started by mhx | Post by mhx
This is a question about history.

Does anybody know *if/why* pre-3.0 SPICE could not handle negative inductors and/or capacitors?
When I try the demo circuit from [1], a very popular SPICE cannot handle it and shows exponentially growing waveforms when asked for a .TRAN. Another SPICE (ngspice) has no problem at all. Both SPICE's calculate a .AC request without a hitch and produce the same result.

Netlist:
Code:
.TITLE negindcap
V2 in 0 PULSE(0 1 0 1u 1u 5u 10u) AC=1
L2 N001 N002  1nH
R2 out  0     100
C1 out  0    -1pF
L1 N001 out   1nH
L3 in   N001 -1nH
C2 N002 0 1pF
* ac dec 100 1G 100G
.options method=gear reltol=1m
.tran 0 {1m+30u} 1m uic
.end
 



-marcel

Ref: K. B. Kumar, "Negative inductors and capacitors for SPICE simulation," in IEEE Circuits and Devices Magazine, vol. 6, no. 6, pp. 11-, Nov. 1990.

10  Simulators / Circuit Simulators / Re: Monte-Carlo Simulations in UMC180...?
 on: May 24th, 2017, 7:34am 
Started by Ramakrishna RSSM | Post by Ramakrishna RSSM
Thanks a lot for you Question AnilReddy.

To the best of my knowledge...
Where
p---> Process
m--->mismatch

Contributions....

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