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Modeling >> Behavioral Models >> Verilog-A : Behavioral model analyzer/optimizer
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Message started by AS on Dec 5^th, 2018, 4:38pm

Title: Verilog-A : Behavioral model analyzer/optimizer
Post by AS on Dec 5^th, 2018, 4:38pm

Hello All,

Is there an analyzer mode in any spice simulator that can help with identification of
simulation speed bottlenecks in Verilog-A models?

Thanks,
AS

Title: Re: Verilog-A : Behavioral model analyzer/optimizer
Post by Frank Wiedmann on Dec 7^th, 2018, 2:06am

You could take a look at https://nanohub.org/resources/vachecker and http://www.mos-ak.org/silicon_valley_2017/presentations/T01_Xie_MOS-AK_Silicon_Valley_2017.pdf.

Title: Re: Verilog-A : Behavioral model analyzer/optimizer
Post by Andrew Beckett on Dec 7^th, 2018, 4:28am

Spectre has an "AHDL Linter". This can be turned on in ADE via Simulation->Options->Analog and is on the Miscellaneous tab. From the command line it's the -ahdllint option.

There are some static checks which will then appear in the normal simulator output log, and then some checks during simulation for potential performance issues or improvements (in ADE the Linter log can be shown from the Simulation menu).

Regards,

Andrew.